Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[cascardo/linux.git] / arch / sh / kernel / cpu / init.c
index 4b339a6..6451ad6 100644 (file)
@@ -3,7 +3,7 @@
  *
  * CPU init code
  *
- * Copyright (C) 2002 - 2006  Paul Mundt
+ * Copyright (C) 2002 - 2007  Paul Mundt
  * Copyright (C) 2003  Richard Curnow
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -41,6 +41,23 @@ __setup("no" __stringify(x), x##_setup);
 onchip_setup(fpu);
 onchip_setup(dsp);
 
+#ifdef CONFIG_SPECULATIVE_EXECUTION
+#define CPUOPM         0xff2f0000
+#define CPUOPM_RABD    (1 << 5)
+
+static void __init speculative_execution_init(void)
+{
+       /* Clear RABD */
+       ctrl_outl(ctrl_inl(CPUOPM) & ~CPUOPM_RABD, CPUOPM);
+
+       /* Flush the update */
+       (void)ctrl_inl(CPUOPM);
+       ctrl_barrier();
+}
+#else
+#define speculative_execution_init()   do { } while (0)
+#endif
+
 /*
  * Generic first-level cache init
  */
@@ -48,8 +65,19 @@ static void __init cache_init(void)
 {
        unsigned long ccr, flags;
 
-       if (current_cpu_data.type == CPU_SH_NONE)
-               panic("Unknown CPU");
+       /* First setup the rest of the I-cache info */
+       current_cpu_data.icache.entry_mask = current_cpu_data.icache.way_incr -
+                                     current_cpu_data.icache.linesz;
+
+       current_cpu_data.icache.way_size = current_cpu_data.icache.sets *
+                                   current_cpu_data.icache.linesz;
+
+       /* And the D-cache too */
+       current_cpu_data.dcache.entry_mask = current_cpu_data.dcache.way_incr -
+                                     current_cpu_data.dcache.linesz;
+
+       current_cpu_data.dcache.way_size = current_cpu_data.dcache.sets *
+                                   current_cpu_data.dcache.linesz;
 
        jump_to_P2();
        ccr = ctrl_inl(CCR);
@@ -200,6 +228,9 @@ asmlinkage void __init sh_cpu_init(void)
        /* First, probe the CPU */
        detect_cpu_and_cache_system();
 
+       if (current_cpu_data.type == CPU_SH_NONE)
+               panic("Unknown CPU");
+
        /* Init the cache */
        cache_init();
 
@@ -247,4 +278,6 @@ asmlinkage void __init sh_cpu_init(void)
         */
        ubc_wakeup();
 #endif
+
+       speculative_execution_init();
 }