perf/x86/intel: Fix PEBS warning by only restoring active PMU in pmi

[cascardo/linux.git] / arch / x86 / events / core.c

diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index 7402c81..5e830d0 100644 (file)
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -597,6 +597,19 @@ void x86_pmu_disable_all(void)
        }
 }
 
+/*
+ * There may be PMI landing after enabled=0. The PMI hitting could be before or
+ * after disable_all.
+ *
+ * If PMI hits before disable_all, the PMU will be disabled in the NMI handler.
+ * It will not be re-enabled in the NMI handler again, because enabled=0. After
+ * handling the NMI, disable_all will be called, which will not change the
+ * state either. If PMI hits after disable_all, the PMU is already disabled
+ * before entering NMI handler. The NMI handler will not change the state
+ * either.
+ *
+ * So either situation is harmless.
+ */
 static void x86_pmu_disable(struct pmu *pmu)
 {
        struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);