hwrng: amd - Convert to new hwrng read() API

[cascardo/linux.git] / drivers / char / hw_random / amd-rng.c

diff --git a/drivers/char/hw_random/amd-rng.c b/drivers/char/hw_random/amd-rng.c
index 4ef94e9..9959c76 100644 (file)
--- a/drivers/char/hw_random/amd-rng.c
+++ b/drivers/char/hw_random/amd-rng.c
@@ -32,6 +32,11 @@
 
 #define DRV_NAME "AMD768-HWRNG"
 
+#define RNGDATA                0x00
+#define RNGDONE                0x04
+#define PMBASE_OFFSET  0xF0
+#define PMBASE_SIZE    8
+
 /*
  * Data for PCI driver interface
  *
@@ -48,31 +53,42 @@ static const struct pci_device_id pci_tbl[] = {
 MODULE_DEVICE_TABLE(pci, pci_tbl);
 
 struct amd768_priv {
+       void __iomem *iobase;
        struct pci_dev *pcidev;
        u32 pmbase;
 };
 
-static int amd_rng_data_present(struct hwrng *rng, int wait)
+static int amd_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
 {
+       u32 *data = buf;
        struct amd768_priv *priv = (struct amd768_priv *)rng->priv;
-       int data, i;
-
-       for (i = 0; i < 20; i++) {
-               data = !!(inl(priv->pmbase + 0xF4) & 1);
-               if (data || !wait)
-                       break;
-               udelay(10);
+       size_t read = 0;
+       /* We will wait at maximum one time per read */
+       int timeout = max / 4 + 1;
+
+       /*
+        * RNG data is available when RNGDONE is set to 1
+        * New random numbers are generated approximately 128 microseconds
+        * after RNGDATA is read
+        */
+       while (read < max) {
+               if (ioread32(priv->iobase + RNGDONE) == 0) {
+                       if (wait) {
+                               /* Delay given by datasheet */
+                               usleep_range(128, 196);
+                               if (timeout-- == 0)
+                                       return read;
+                       } else {
+                               return 0;
+                       }
+               } else {
+                       *data = ioread32(priv->iobase + RNGDATA);
+                       data++;
+                       read += 4;
+               }
        }
-       return data;
-}
-
-static int amd_rng_data_read(struct hwrng *rng, u32 *data)
-{
-       struct amd768_priv *priv = (struct amd768_priv *)rng->priv;
 
-       *data = inl(priv->pmbase + 0xF0);
-
-       return 4;
+       return read;
 }
 
 static int amd_rng_init(struct hwrng *rng)
@@ -105,8 +121,7 @@ static struct hwrng amd_rng = {
        .name           = "amd",
        .init           = amd_rng_init,
        .cleanup        = amd_rng_cleanup,
-       .data_present   = amd_rng_data_present,
-       .data_read      = amd_rng_data_read,
+       .read           = amd_rng_read,
 };
 
 static int __init mod_init(void)
@@ -138,12 +153,20 @@ found:
        if (!priv)
                return -ENOMEM;
 
-       if (!request_region(pmbase + 0xF0, 8, DRV_NAME)) {
+       if (!request_region(pmbase + PMBASE_OFFSET, PMBASE_SIZE, DRV_NAME)) {
                dev_err(&pdev->dev, DRV_NAME " region 0x%x already in use!\n",
                        pmbase + 0xF0);
                err = -EBUSY;
                goto out;
        }
+
+       priv->iobase = ioport_map(pmbase + PMBASE_OFFSET, PMBASE_SIZE);
+       if (!priv->iobase) {
+               pr_err(DRV_NAME "Cannot map ioport\n");
+               err = -EINVAL;
+               goto err_iomap;
+       }
+
        amd_rng.priv = (unsigned long)priv;
        priv->pmbase = pmbase;
        priv->pcidev = pdev;
@@ -152,11 +175,14 @@ found:
        err = hwrng_register(&amd_rng);
        if (err) {
                pr_err(DRV_NAME " registering failed (%d)\n", err);
-               release_region(pmbase + 0xF0, 8);
-               goto out;
+               goto err_hwrng;
        }
        return 0;
 
+err_hwrng:
+       ioport_unmap(priv->iobase);
+err_iomap:
+       release_region(pmbase + PMBASE_OFFSET, PMBASE_SIZE);
 out:
        kfree(priv);
        return err;
@@ -170,7 +196,9 @@ static void __exit mod_exit(void)
 
        hwrng_unregister(&amd_rng);
 
-       release_region(priv->pmbase + 0xF0, 8);
+       ioport_unmap(priv->iobase);
+
+       release_region(priv->pmbase + PMBASE_OFFSET, PMBASE_SIZE);
 
        kfree(priv);
 }