Merge branch 'acpica'

[cascardo/linux.git] / drivers / clocksource / exynos_mct.c

diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index f71d55f..ab51bf2 100644 (file)
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -162,7 +162,7 @@ static void exynos4_mct_frc_start(void)
        exynos4_mct_write(reg, EXYNOS4_MCT_G_TCON);
 }
 
-static cycle_t exynos4_frc_read(struct clocksource *cs)
+static cycle_t notrace _exynos4_frc_read(void)
 {
        unsigned int lo, hi;
        u32 hi2 = __raw_readl(reg_base + EXYNOS4_MCT_G_CNT_U);
@@ -176,6 +176,11 @@ static cycle_t exynos4_frc_read(struct clocksource *cs)
        return ((cycle_t)hi << 32) | lo;
 }
 
+static cycle_t exynos4_frc_read(struct clocksource *cs)
+{
+       return _exynos4_frc_read();
+}
+
 static void exynos4_frc_resume(struct clocksource *cs)
 {
        exynos4_mct_frc_start();
@@ -192,13 +197,24 @@ struct clocksource mct_frc = {
 
 static u64 notrace exynos4_read_sched_clock(void)
 {
-       return exynos4_frc_read(&mct_frc);
+       return _exynos4_frc_read();
+}
+
+static struct delay_timer exynos4_delay_timer;
+
+static cycles_t exynos4_read_current_timer(void)
+{
+       return _exynos4_frc_read();
 }
 
 static void __init exynos4_clocksource_init(void)
 {
        exynos4_mct_frc_start();
 
+       exynos4_delay_timer.read_current_timer = &exynos4_read_current_timer;
+       exynos4_delay_timer.freq = clk_rate;
+       register_current_timer_delay(&exynos4_delay_timer);
+
        if (clocksource_register_hz(&mct_frc, clk_rate))
                panic("%s: can't register clocksource\n", mct_frc.name);