Merge tag 'for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power...
[cascardo/linux.git] / drivers / clocksource / time-pistachio.c
index 376e59b..a7d9a08 100644 (file)
@@ -148,7 +148,7 @@ static struct pistachio_clocksource pcs_gpt = {
                },
 };
 
-static void __init pistachio_clksrc_of_init(struct device_node *node)
+static int __init pistachio_clksrc_of_init(struct device_node *node)
 {
        struct clk *sys_clk, *fast_clk;
        struct regmap *periph_regs;
@@ -158,45 +158,45 @@ static void __init pistachio_clksrc_of_init(struct device_node *node)
        pcs_gpt.base = of_iomap(node, 0);
        if (!pcs_gpt.base) {
                pr_err("cannot iomap\n");
-               return;
+               return -ENXIO;
        }
 
        periph_regs = syscon_regmap_lookup_by_phandle(node, "img,cr-periph");
        if (IS_ERR(periph_regs)) {
                pr_err("cannot get peripheral regmap (%ld)\n",
                       PTR_ERR(periph_regs));
-               return;
+               return PTR_ERR(periph_regs);
        }
 
        /* Switch to using the fast counter clock */
        ret = regmap_update_bits(periph_regs, PERIP_TIMER_CONTROL,
                                 0xf, 0x0);
        if (ret)
-               return;
+               return ret;
 
        sys_clk = of_clk_get_by_name(node, "sys");
        if (IS_ERR(sys_clk)) {
                pr_err("clock get failed (%ld)\n", PTR_ERR(sys_clk));
-               return;
+               return PTR_ERR(sys_clk);
        }
 
        fast_clk = of_clk_get_by_name(node, "fast");
        if (IS_ERR(fast_clk)) {
                pr_err("clock get failed (%lu)\n", PTR_ERR(fast_clk));
-               return;
+               return PTR_ERR(fast_clk);
        }
 
        ret = clk_prepare_enable(sys_clk);
        if (ret < 0) {
                pr_err("failed to enable clock (%d)\n", ret);
-               return;
+               return ret;
        }
 
        ret = clk_prepare_enable(fast_clk);
        if (ret < 0) {
                pr_err("failed to enable clock (%d)\n", ret);
                clk_disable_unprepare(sys_clk);
-               return;
+               return ret;
        }
 
        rate = clk_get_rate(fast_clk);
@@ -212,7 +212,7 @@ static void __init pistachio_clksrc_of_init(struct device_node *node)
 
        raw_spin_lock_init(&pcs_gpt.lock);
        sched_clock_register(pistachio_read_sched_clock, 32, rate);
-       clocksource_register_hz(&pcs_gpt.cs, rate);
+       return clocksource_register_hz(&pcs_gpt.cs, rate);
 }
 CLOCKSOURCE_OF_DECLARE(pistachio_gptimer, "img,pistachio-gptimer",
                       pistachio_clksrc_of_init);