Merge branch 'linux_next' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab...

[cascardo/linux.git] / drivers / edac / Kconfig

diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index 6671992..e443f2c 100644 (file)
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -80,6 +80,29 @@ config EDAC_MM_EDAC
          occurred so that a particular failing memory module can be
          replaced.  If unsure, select 'Y'.
 
+config EDAC_GHES
+       bool "Output ACPI APEI/GHES BIOS detected errors via EDAC"
+       depends on ACPI_APEI_GHES && (EDAC_MM_EDAC=y)
+       default y
+       help
+         Not all machines support hardware-driven error report. Some of those
+         provide a BIOS-driven error report mechanism via ACPI, using the
+         APEI/GHES driver. By enabling this option, the error reports provided
+         by GHES are sent to userspace via the EDAC API.
+
+         When this option is enabled, it will disable the hardware-driven
+         mechanisms, if a GHES BIOS is detected, entering into the
+         "Firmware First" mode.
+
+         It should be noticed that keeping both GHES and a hardware-driven
+         error mechanism won't work well, as BIOS will race with OS, while
+         reading the error registers. So, if you want to not use "Firmware
+         first" GHES error mechanism, you should disable GHES either at
+         compilation time or by passing "ghes.disable=1" Kernel parameter
+         at boot time.
+
+         In doubt, say 'Y'.
+
 config EDAC_AMD64
        tristate "AMD64 (Opteron, Athlon64) K8, F10h"
        depends on EDAC_MM_EDAC && AMD_NB && X86_64 && EDAC_DECODE_MCE
@@ -158,7 +181,7 @@ config EDAC_I3000
 
 config EDAC_I3200
        tristate "Intel 3200"
-       depends on EDAC_MM_EDAC && PCI && X86 && EXPERIMENTAL
+       depends on EDAC_MM_EDAC && PCI && X86
        help
          Support for error detection and correction on the Intel
          3200 and 3210 server chipsets.
@@ -224,7 +247,7 @@ config EDAC_I7300
 config EDAC_SBRIDGE
        tristate "Intel Sandy-Bridge Integrated MC"
        depends on EDAC_MM_EDAC && PCI && X86_64 && X86_MCE_INTEL
-       depends on PCI_MMCONFIG && EXPERIMENTAL
+       depends on PCI_MMCONFIG
        help
          Support for error detection and correction the Intel
          Sandy Bridge Integrated Memory Controller.