drm/amdgpu/dce11: add dce clock setting for ELM/BAF

[cascardo/linux.git] / drivers / gpu / drm / amd / amdgpu / gfx_v7_0.c

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index bb87090..86657e3 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -4414,7 +4414,7 @@ static int gfx_v7_0_sw_init(void *handle)
                ring = &adev->gfx.gfx_ring[i];
                ring->ring_obj = NULL;
                sprintf(ring->name, "gfx");
-               r = amdgpu_ring_init(adev, ring, 1024 * 1024,
+               r = amdgpu_ring_init(adev, ring, 1024,
                                     PACKET3(PACKET3_NOP, 0x3FFF), 0xf,
                                     &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_EOP,
                                     AMDGPU_RING_TYPE_GFX);
@@ -4438,10 +4438,10 @@ static int gfx_v7_0_sw_init(void *handle)
                ring->me = 1; /* first MEC */
                ring->pipe = i / 8;
                ring->queue = i % 8;
-               sprintf(ring->name, "comp %d.%d.%d", ring->me, ring->pipe, ring->queue);
+               sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue);
                irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP + ring->pipe;
                /* type-2 packets are deprecated on MEC, use type-3 instead */
-               r = amdgpu_ring_init(adev, ring, 1024 * 1024,
+               r = amdgpu_ring_init(adev, ring, 1024,
                                     PACKET3(PACKET3_NOP, 0x3FFF), 0xf,
                                     &adev->gfx.eop_irq, irq_type,
                                     AMDGPU_RING_TYPE_COMPUTE);