Merge tag 'v4.6-rc3' into drm-intel-next-queued

[cascardo/linux.git] / drivers / gpu / drm / i915 / intel_psr.c

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 0b42ada..c3abae4 100644 (file)
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -507,7 +507,8 @@ static void hsw_psr_disable(struct intel_dp *intel_dp)
 
                /* Wait till PSR is idle */
                if (_wait_for((I915_READ(EDP_PSR_STATUS_CTL) &
-                              EDP_PSR_STATUS_STATE_MASK) == 0, 2000, 10))
+                              EDP_PSR_STATUS_STATE_MASK) == 0,
+                              2 * USEC_PER_SEC, 10 * USEC_PER_MSEC))
                        DRM_ERROR("Timed out waiting for PSR Idle State\n");
 
                dev_priv->psr.active = false;
@@ -562,7 +563,7 @@ static void intel_psr_work(struct work_struct *work)
         * PSR might take some time to get fully disabled
         * and be ready for re-enable.
         */
-       if (HAS_DDI(dev_priv->dev)) {
+       if (HAS_DDI(dev_priv)) {
                if (wait_for((I915_READ(EDP_PSR_STATUS_CTL) &
                              EDP_PSR_STATUS_STATE_MASK) == 0, 50)) {
                        DRM_ERROR("Timed out waiting for PSR Idle for re-enable\n");
@@ -780,8 +781,7 @@ void intel_psr_init(struct drm_device *dev)
 
        /* Per platform default */
        if (i915.enable_psr == -1) {
-               if (IS_HASWELL(dev) || IS_BROADWELL(dev) ||
-                   IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
+               if (IS_HASWELL(dev) || IS_BROADWELL(dev))
                        i915.enable_psr = 1;
                else
                        i915.enable_psr = 0;