Merge branch 'smack-for-3.19' of git://git.gitorious.org/smack-next/kernel into next

[cascardo/linux.git] / drivers / gpu / drm / nouveau / nv04_fbcon.c

diff --git a/drivers/gpu/drm/nouveau/nv04_fbcon.c b/drivers/gpu/drm/nouveau/nv04_fbcon.c
index 8fe32bb..4ef602c 100644 (file)
--- a/drivers/gpu/drm/nouveau/nv04_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nv04_fbcon.c
@@ -22,8 +22,6 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#include <core/object.h>
-
 #include "nouveau_drm.h"
 #include "nouveau_dma.h"
 #include "nouveau_fbcon.h"
@@ -141,8 +139,7 @@ nv04_fbcon_accel_init(struct fb_info *info)
        struct drm_device *dev = nfbdev->dev;
        struct nouveau_drm *drm = nouveau_drm(dev);
        struct nouveau_channel *chan = drm->channel;
-       struct nouveau_device *device = nv_device(drm->device);
-       struct nouveau_object *object;
+       struct nvif_device *device = &drm->device;
        int surface_fmt, pattern_fmt, rect_fmt;
        int ret;
 
@@ -174,35 +171,35 @@ nv04_fbcon_accel_init(struct fb_info *info)
                return -EINVAL;
        }
 
-       ret = nouveau_object_new(nv_object(chan->cli), NVDRM_CHAN, NvCtxSurf2D,
-                                device->card_type >= NV_10 ? 0x0062 : 0x0042,
-                                NULL, 0, &object);
+       ret = nvif_object_init(chan->object, NULL, 0x0062,
+                              device->info.family >= NV_DEVICE_INFO_V0_CELSIUS ?
+                              0x0062 : 0x0042, NULL, 0, &nfbdev->surf2d);
        if (ret)
                return ret;
 
-       ret = nouveau_object_new(nv_object(chan->cli), NVDRM_CHAN, NvClipRect,
-                                0x0019, NULL, 0, &object);
+       ret = nvif_object_init(chan->object, NULL, 0x0019, 0x0019, NULL, 0,
+                              &nfbdev->clip);
        if (ret)
                return ret;
 
-       ret = nouveau_object_new(nv_object(chan->cli), NVDRM_CHAN, NvRop,
-                                0x0043, NULL, 0, &object);
+       ret = nvif_object_init(chan->object, NULL, 0x0043, 0x0043, NULL, 0,
+                              &nfbdev->rop);
        if (ret)
                return ret;
 
-       ret = nouveau_object_new(nv_object(chan->cli), NVDRM_CHAN, NvImagePatt,
-                                0x0044, NULL, 0, &object);
+       ret = nvif_object_init(chan->object, NULL, 0x0044, 0x0044, NULL, 0,
+                              &nfbdev->patt);
        if (ret)
                return ret;
 
-       ret = nouveau_object_new(nv_object(chan->cli), NVDRM_CHAN, NvGdiRect,
-                                0x004a, NULL, 0, &object);
+       ret = nvif_object_init(chan->object, NULL, 0x004a, 0x004a, NULL, 0,
+                              &nfbdev->gdi);
        if (ret)
                return ret;
 
-       ret = nouveau_object_new(nv_object(chan->cli), NVDRM_CHAN, NvImageBlit,
-                                device->chipset >= 0x11 ? 0x009f : 0x005f,
-                                NULL, 0, &object);
+       ret = nvif_object_init(chan->object, NULL, 0x005f,
+                              device->info.chipset >= 0x11 ? 0x009f : 0x005f,
+                              NULL, 0, &nfbdev->blit);
        if (ret)
                return ret;
 
@@ -212,10 +209,10 @@ nv04_fbcon_accel_init(struct fb_info *info)
        }
 
        BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0000, 1);
-       OUT_RING(chan, NvCtxSurf2D);
+       OUT_RING(chan, nfbdev->surf2d.handle);
        BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0184, 2);
-       OUT_RING(chan, NvDmaFB);
-       OUT_RING(chan, NvDmaFB);
+       OUT_RING(chan, chan->vram.handle);
+       OUT_RING(chan, chan->vram.handle);
        BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0300, 4);
        OUT_RING(chan, surface_fmt);
        OUT_RING(chan, info->fix.line_length | (info->fix.line_length << 16));
@@ -223,12 +220,12 @@ nv04_fbcon_accel_init(struct fb_info *info)
        OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base);
 
        BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0000, 1);
-       OUT_RING(chan, NvRop);
+       OUT_RING(chan, nfbdev->rop.handle);
        BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0300, 1);
        OUT_RING(chan, 0x55);
 
        BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0000, 1);
-       OUT_RING(chan, NvImagePatt);
+       OUT_RING(chan, nfbdev->patt.handle);
        BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0300, 8);
        OUT_RING(chan, pattern_fmt);
 #ifdef __BIG_ENDIAN
@@ -244,18 +241,18 @@ nv04_fbcon_accel_init(struct fb_info *info)
        OUT_RING(chan, ~0);
 
        BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0000, 1);
-       OUT_RING(chan, NvClipRect);
+       OUT_RING(chan, nfbdev->clip.handle);
        BEGIN_NV04(chan, NvSubCtxSurf2D, 0x0300, 2);
        OUT_RING(chan, 0);
        OUT_RING(chan, (info->var.yres_virtual << 16) | info->var.xres_virtual);
 
        BEGIN_NV04(chan, NvSubImageBlit, 0x0000, 1);
-       OUT_RING(chan, NvImageBlit);
+       OUT_RING(chan, nfbdev->blit.handle);
        BEGIN_NV04(chan, NvSubImageBlit, 0x019c, 1);
-       OUT_RING(chan, NvCtxSurf2D);
+       OUT_RING(chan, nfbdev->surf2d.handle);
        BEGIN_NV04(chan, NvSubImageBlit, 0x02fc, 1);
        OUT_RING(chan, 3);
-       if (device->chipset >= 0x11 /*XXX: oclass == 0x009f*/) {
+       if (device->info.chipset >= 0x11 /*XXX: oclass == 0x009f*/) {
                BEGIN_NV04(chan, NvSubImageBlit, 0x0120, 3);
                OUT_RING(chan, 0);
                OUT_RING(chan, 1);
@@ -263,12 +260,12 @@ nv04_fbcon_accel_init(struct fb_info *info)
        }
 
        BEGIN_NV04(chan, NvSubGdiRect, 0x0000, 1);
-       OUT_RING(chan, NvGdiRect);
+       OUT_RING(chan, nfbdev->gdi.handle);
        BEGIN_NV04(chan, NvSubGdiRect, 0x0198, 1);
-       OUT_RING(chan, NvCtxSurf2D);
+       OUT_RING(chan, nfbdev->surf2d.handle);
        BEGIN_NV04(chan, NvSubGdiRect, 0x0188, 2);
-       OUT_RING(chan, NvImagePatt);
-       OUT_RING(chan, NvRop);
+       OUT_RING(chan, nfbdev->patt.handle);
+       OUT_RING(chan, nfbdev->rop.handle);
        BEGIN_NV04(chan, NvSubGdiRect, 0x0304, 1);
        OUT_RING(chan, 1);
        BEGIN_NV04(chan, NvSubGdiRect, 0x0300, 1);