Merge remote branch 'intel/drm-intel-next' of ../drm-next into drm-core-next
[cascardo/linux.git] / drivers / gpu / drm / radeon / atombios_crtc.c
index 095bc50..a2199fe 100644 (file)
@@ -557,9 +557,9 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
 
                        /* use recommended ref_div for ss */
                        if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
-                               pll->flags |= RADEON_PLL_PREFER_MINM_OVER_MAXP;
                                if (ss_enabled) {
                                        if (ss->refdiv) {
+                                               pll->flags |= RADEON_PLL_PREFER_MINM_OVER_MAXP;
                                                pll->flags |= RADEON_PLL_USE_REF_DIV;
                                                pll->reference_div = ss->refdiv;
                                                if (ASIC_IS_AVIVO(rdev))
@@ -662,10 +662,12 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
                                                   index, (uint32_t *)&args);
                                adjusted_clock = le32_to_cpu(args.v3.sOutput.ulDispPllFreq) * 10;
                                if (args.v3.sOutput.ucRefDiv) {
+                                       pll->flags |= RADEON_PLL_USE_FRAC_FB_DIV;
                                        pll->flags |= RADEON_PLL_USE_REF_DIV;
                                        pll->reference_div = args.v3.sOutput.ucRefDiv;
                                }
                                if (args.v3.sOutput.ucPostDiv) {
+                                       pll->flags |= RADEON_PLL_USE_FRAC_FB_DIV;
                                        pll->flags |= RADEON_PLL_USE_POST_DIV;
                                        pll->post_div = args.v3.sOutput.ucPostDiv;
                                }
@@ -1024,7 +1026,7 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
         * just update base pointers
         */
        obj = radeon_fb->obj;
-       rbo = obj->driver_private;
+       rbo = gem_to_radeon_bo(obj);
        r = radeon_bo_reserve(rbo, false);
        if (unlikely(r != 0))
                return r;
@@ -1133,7 +1135,7 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
 
        if (!atomic && fb && fb != crtc->fb) {
                radeon_fb = to_radeon_framebuffer(fb);
-               rbo = radeon_fb->obj->driver_private;
+               rbo = gem_to_radeon_bo(radeon_fb->obj);
                r = radeon_bo_reserve(rbo, false);
                if (unlikely(r != 0))
                        return r;
@@ -1179,7 +1181,7 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc,
        }
 
        obj = radeon_fb->obj;
-       rbo = obj->driver_private;
+       rbo = gem_to_radeon_bo(obj);
        r = radeon_bo_reserve(rbo, false);
        if (unlikely(r != 0))
                return r;
@@ -1290,7 +1292,7 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc,
 
        if (!atomic && fb && fb != crtc->fb) {
                radeon_fb = to_radeon_framebuffer(fb);
-               rbo = radeon_fb->obj->driver_private;
+               rbo = gem_to_radeon_bo(radeon_fb->obj);
                r = radeon_bo_reserve(rbo, false);
                if (unlikely(r != 0))
                        return r;