mmc: esdhc: Fix bug when writing to SDHCI_HOST_CONTROL register

[cascardo/linux.git] / drivers / mmc / host / sdhci-of-esdhc.c

diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
index 5e68adc..15039e2 100644 (file)
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -13,6 +13,7 @@
  * your option) any later version.
  */
 
+#include <linux/err.h>
 #include <linux/io.h>
 #include <linux/of.h>
 #include <linux/delay.h>
@@ -120,6 +121,13 @@ static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg)
        if (reg == SDHCI_HOST_CONTROL) {
                u32 dma_bits;
 
+               /*
+                * If host control register is not standard, exit
+                * this function
+                */
+               if (host->quirks2 & SDHCI_QUIRK2_BROKEN_HOST_CONTROL)
+                       return;
+
                /* DMA select is 22,23 bits in Protocol Control Register */
                dma_bits = (val & SDHCI_CTRL_DMA_MASK) << 5;
                clrsetbits_be32(host->ioaddr + reg , SDHCI_CTRL_DMA_MASK << 5,
@@ -200,7 +208,7 @@ static void esdhc_of_set_clock(struct sdhci_host *host, unsigned int clock)
        }
 
        /* Set the clock */
-       esdhc_set_clock(host, clock);
+       esdhc_set_clock(host, clock, host->max_clk);
 }
 
 #ifdef CONFIG_PM
@@ -230,6 +238,30 @@ static void esdhc_of_platform_init(struct sdhci_host *host)
                host->quirks &= ~SDHCI_QUIRK_NO_BUSY_IRQ;
 }
 
+static int esdhc_pltfm_bus_width(struct sdhci_host *host, int width)
+{
+       u32 ctrl;
+
+       switch (width) {
+       case MMC_BUS_WIDTH_8:
+               ctrl = ESDHC_CTRL_8BITBUS;
+               break;
+
+       case MMC_BUS_WIDTH_4:
+               ctrl = ESDHC_CTRL_4BITBUS;
+               break;
+
+       default:
+               ctrl = 0;
+               break;
+       }
+
+       clrsetbits_be32(host->ioaddr + SDHCI_HOST_CONTROL,
+                       ESDHC_CTRL_BUSWIDTH_MASK, ctrl);
+
+       return 0;
+}
+
 static const struct sdhci_ops sdhci_esdhc_ops = {
        .read_l = esdhc_readl,
        .read_w = esdhc_readw,
@@ -247,6 +279,7 @@ static const struct sdhci_ops sdhci_esdhc_ops = {
        .platform_resume = esdhc_of_resume,
 #endif
        .adma_workaround = esdhci_of_adma_workaround,
+       .platform_bus_width = esdhc_pltfm_bus_width,
 };
 
 static const struct sdhci_pltfm_data sdhci_esdhc_pdata = {
@@ -262,7 +295,33 @@ static const struct sdhci_pltfm_data sdhci_esdhc_pdata = {
 
 static int sdhci_esdhc_probe(struct platform_device *pdev)
 {
-       return sdhci_pltfm_register(pdev, &sdhci_esdhc_pdata);
+       struct sdhci_host *host;
+       struct device_node *np;
+       int ret;
+
+       host = sdhci_pltfm_init(pdev, &sdhci_esdhc_pdata, 0);
+       if (IS_ERR(host))
+               return PTR_ERR(host);
+
+       sdhci_get_of_property(pdev);
+
+       np = pdev->dev.of_node;
+       if (of_device_is_compatible(np, "fsl,p2020-esdhc")) {
+               /*
+                * Freescale messed up with P2020 as it has a non-standard
+                * host control register
+                */
+               host->quirks2 |= SDHCI_QUIRK2_BROKEN_HOST_CONTROL;
+       }
+
+       /* call to generic mmc_of_parse to support additional capabilities */
+       mmc_of_parse(host->mmc);
+
+       ret = sdhci_add_host(host);
+       if (ret)
+               sdhci_pltfm_free(pdev);
+
+       return ret;
 }
 
 static int sdhci_esdhc_remove(struct platform_device *pdev)