bnx2: Allow flexible VLAN tag settings.

[cascardo/linux.git] / drivers / net / bnx2.c

diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index ad61cfd..2d0213e 100644 (file)
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -87,6 +87,7 @@ typedef enum {
        BCM5708S,
        BCM5709,
        BCM5709S,
+       BCM5716,
 } board_t;
 
 /* indexed by board_t, above */
@@ -102,9 +103,10 @@ static struct {
        { "Broadcom NetXtreme II BCM5708 1000Base-SX" },
        { "Broadcom NetXtreme II BCM5709 1000Base-T" },
        { "Broadcom NetXtreme II BCM5709 1000Base-SX" },
+       { "Broadcom NetXtreme II BCM5716 1000Base-T" },
        };
 
-static struct pci_device_id bnx2_pci_tbl[] = {
+static DEFINE_PCI_DEVICE_TABLE(bnx2_pci_tbl) = {
        { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_NX2_5706,
          PCI_VENDOR_ID_HP, 0x3101, 0, 0, NC370T },
        { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_NX2_5706,
@@ -123,6 +125,8 @@ static struct pci_device_id bnx2_pci_tbl[] = {
          PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5709 },
        { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_NX2_5709S,
          PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5709S },
+       { PCI_VENDOR_ID_BROADCOM, 0x163b,
+         PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5716 },
        { 0, }
 };
 
@@ -1487,7 +1491,7 @@ bnx2_phy_get_pause_adv(struct bnx2 *bp)
        return adv;
 }
 
-static int bnx2_fw_sync(struct bnx2 *, u32, int);
+static int bnx2_fw_sync(struct bnx2 *, u32, int, int);
 
 static int
 bnx2_setup_remote_phy(struct bnx2 *bp, u8 port)
@@ -1540,7 +1544,7 @@ bnx2_setup_remote_phy(struct bnx2 *bp, u8 port)
        bnx2_shmem_wr(bp, BNX2_DRV_MB_ARG0, speed_arg);
 
        spin_unlock_bh(&bp->phy_lock);
-       bnx2_fw_sync(bp, BNX2_DRV_MSG_CODE_CMD_SET_LINK, 0);
+       bnx2_fw_sync(bp, BNX2_DRV_MSG_CODE_CMD_SET_LINK, 1, 0);
        spin_lock_bh(&bp->phy_lock);
 
        return 0;
@@ -2258,7 +2262,7 @@ bnx2_set_phy_loopback(struct bnx2 *bp)
 }
 
 static int
-bnx2_fw_sync(struct bnx2 *bp, u32 msg_data, int silent)
+bnx2_fw_sync(struct bnx2 *bp, u32 msg_data, int ack, int silent)
 {
        int i;
        u32 val;
@@ -2268,6 +2272,9 @@ bnx2_fw_sync(struct bnx2 *bp, u32 msg_data, int silent)
 
        bnx2_shmem_wr(bp, BNX2_DRV_MB, msg_data);
 
+       if (!ack)
+               return 0;
+
        /* wait for an acknowledgement. */
        for (i = 0; i < (FW_ACK_TIME_OUT_MS / 10); i++) {
                msleep(10);
@@ -3606,7 +3613,8 @@ bnx2_set_power_state(struct bnx2 *bp, pci_power_t state)
                }
 
                if (!(bp->flags & BNX2_FLAG_NO_WOL))
-                       bnx2_fw_sync(bp, BNX2_DRV_MSG_DATA_WAIT3 | wol_msg, 0);
+                       bnx2_fw_sync(bp, BNX2_DRV_MSG_DATA_WAIT3 | wol_msg,
+                                    1, 0);
 
                pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
                if ((CHIP_ID(bp) == CHIP_ID_5706_A0) ||
@@ -4247,35 +4255,43 @@ nvram_write_end:
 }
 
 static void
-bnx2_init_remote_phy(struct bnx2 *bp)
+bnx2_init_fw_cap(struct bnx2 *bp)
 {
-       u32 val;
+       u32 val, sig = 0;
 
        bp->phy_flags &= ~BNX2_PHY_FLAG_REMOTE_PHY_CAP;
-       if (!(bp->phy_flags & BNX2_PHY_FLAG_SERDES))
-               return;
+       bp->flags &= ~BNX2_FLAG_CAN_KEEP_VLAN;
+
+       if (!(bp->flags & BNX2_FLAG_ASF_ENABLE))
+               bp->flags |= BNX2_FLAG_CAN_KEEP_VLAN;
 
        val = bnx2_shmem_rd(bp, BNX2_FW_CAP_MB);
        if ((val & BNX2_FW_CAP_SIGNATURE_MASK) != BNX2_FW_CAP_SIGNATURE)
                return;
 
-       if (val & BNX2_FW_CAP_REMOTE_PHY_CAPABLE) {
+       if ((val & BNX2_FW_CAP_CAN_KEEP_VLAN) == BNX2_FW_CAP_CAN_KEEP_VLAN) {
+               bp->flags |= BNX2_FLAG_CAN_KEEP_VLAN;
+               sig |= BNX2_DRV_ACK_CAP_SIGNATURE | BNX2_FW_CAP_CAN_KEEP_VLAN;
+       }
+
+       if ((bp->phy_flags & BNX2_PHY_FLAG_SERDES) &&
+           (val & BNX2_FW_CAP_REMOTE_PHY_CAPABLE)) {
+               u32 link;
+
                bp->phy_flags |= BNX2_PHY_FLAG_REMOTE_PHY_CAP;
 
-               val = bnx2_shmem_rd(bp, BNX2_LINK_STATUS);
-               if (val & BNX2_LINK_STATUS_SERDES_LINK)
+               link = bnx2_shmem_rd(bp, BNX2_LINK_STATUS);
+               if (link & BNX2_LINK_STATUS_SERDES_LINK)
                        bp->phy_port = PORT_FIBRE;
                else
                        bp->phy_port = PORT_TP;
 
-               if (netif_running(bp->dev)) {
-                       u32 sig;
-
-                       sig = BNX2_DRV_ACK_CAP_SIGNATURE |
-                             BNX2_FW_CAP_REMOTE_PHY_CAPABLE;
-                       bnx2_shmem_wr(bp, BNX2_DRV_ACK_CAP_MB, sig);
-               }
+               sig |= BNX2_DRV_ACK_CAP_SIGNATURE |
+                      BNX2_FW_CAP_REMOTE_PHY_CAPABLE;
        }
+
+       if (netif_running(bp->dev) && sig)
+               bnx2_shmem_wr(bp, BNX2_DRV_ACK_CAP_MB, sig);
 }
 
 static void
@@ -4305,7 +4321,7 @@ bnx2_reset_chip(struct bnx2 *bp, u32 reset_code)
        udelay(5);
 
        /* Wait for the firmware to tell us it is ok to issue a reset. */
-       bnx2_fw_sync(bp, BNX2_DRV_MSG_DATA_WAIT0 | reset_code, 1);
+       bnx2_fw_sync(bp, BNX2_DRV_MSG_DATA_WAIT0 | reset_code, 1, 1);
 
        /* Deposit a driver reset signature so the firmware knows that
         * this is a soft reset. */
@@ -4366,13 +4382,13 @@ bnx2_reset_chip(struct bnx2 *bp, u32 reset_code)
        }
 
        /* Wait for the firmware to finish its initialization. */
-       rc = bnx2_fw_sync(bp, BNX2_DRV_MSG_DATA_WAIT1 | reset_code, 0);
+       rc = bnx2_fw_sync(bp, BNX2_DRV_MSG_DATA_WAIT1 | reset_code, 1, 0);
        if (rc)
                return rc;
 
        spin_lock_bh(&bp->phy_lock);
        old_port = bp->phy_port;
-       bnx2_init_remote_phy(bp);
+       bnx2_init_fw_cap(bp);
        if ((bp->phy_flags & BNX2_PHY_FLAG_REMOTE_PHY_CAP) &&
            old_port != bp->phy_port)
                bnx2_set_default_remote_link(bp);
@@ -4592,7 +4608,7 @@ bnx2_init_chip(struct bnx2 *bp)
                REG_WR(bp, BNX2_MISC_NEW_CORE_CTL, val);
        }
        rc = bnx2_fw_sync(bp, BNX2_DRV_MSG_DATA_WAIT2 | BNX2_DRV_MSG_CODE_RESET,
-                         0);
+                         1, 0);
 
        REG_WR(bp, BNX2_MISC_ENABLE_SET_BITS, BNX2_MISC_ENABLE_DEFAULT);
        REG_RD(bp, BNX2_MISC_ENABLE_SET_BITS);
@@ -5871,6 +5887,8 @@ bnx2_vlan_rx_register(struct net_device *dev, struct vlan_group *vlgrp)
 
        bp->vlgrp = vlgrp;
        bnx2_set_rx_mode(dev);
+       if (bp->flags & BNX2_FLAG_CAN_KEEP_VLAN)
+               bnx2_fw_sync(bp, BNX2_DRV_MSG_CODE_KEEP_VLAN_UPDATE, 0, 1);
 
        bnx2_netif_start(bp);
 }
@@ -6215,6 +6233,12 @@ bnx2_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
            !(bp->phy_flags & BNX2_PHY_FLAG_REMOTE_PHY_CAP))
                goto err_out_unlock;
 
+       /* If device is down, we can store the settings only if the user
+        * is setting the currently active port.
+        */
+       if (!netif_running(dev) && cmd->port != bp->phy_port)
+               goto err_out_unlock;
+
        if (cmd->autoneg == AUTONEG_ENABLE) {
                autoneg |= AUTONEG_SPEED;
 
@@ -6272,7 +6296,12 @@ bnx2_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
        bp->req_line_speed = req_line_speed;
        bp->req_duplex = req_duplex;
 
-       err = bnx2_setup_phy(bp, cmd->port);
+       err = 0;
+       /* If device is down, the new settings will be picked up when it is
+        * brought up.
+        */
+       if (netif_running(dev))
+               err = bnx2_setup_phy(bp, cmd->port);
 
 err_out_unlock:
        spin_unlock_bh(&bp->phy_lock);
@@ -7464,8 +7493,6 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
                        if (reg & BNX2_SHARED_HW_CFG_PHY_2_5G)
                                bp->phy_flags |= BNX2_PHY_FLAG_2_5G_CAPABLE;
                }
-               bnx2_init_remote_phy(bp);
-
        } else if (CHIP_NUM(bp) == CHIP_NUM_5706 ||
                   CHIP_NUM(bp) == CHIP_NUM_5708)
                bp->phy_flags |= BNX2_PHY_FLAG_CRC_FIX;
@@ -7474,6 +7501,8 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
                  CHIP_REV(bp) == CHIP_REV_Bx))
                bp->phy_flags |= BNX2_PHY_FLAG_DIS_EARLY_DAC;
 
+       bnx2_init_fw_cap(bp);
+
        if ((CHIP_ID(bp) == CHIP_ID_5708_A0) ||
            (CHIP_ID(bp) == CHIP_ID_5708_B0) ||
            (CHIP_ID(bp) == CHIP_ID_5708_B1)) {