Merge tag 'arc-4.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc

[cascardo/linux.git] / drivers / net / ethernet / intel / i40evf / i40e_adminq_cmd.h

diff --git a/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h b/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h
index f5b2b36..aad8d62 100644 (file)
--- a/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h
+++ b/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h
@@ -1,7 +1,7 @@
 /*******************************************************************************
  *
  * Intel Ethernet Controller XL710 Family Linux Virtual Function Driver
- * Copyright(c) 2013 - 2014 Intel Corporation.
+ * Copyright(c) 2013 - 2016 Intel Corporation.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -34,7 +34,7 @@
  */
 
 #define I40E_FW_API_VERSION_MAJOR      0x0001
-#define I40E_FW_API_VERSION_MINOR      0x0004
+#define I40E_FW_API_VERSION_MINOR      0x0005
 
 struct i40e_aq_desc {
        __le16 flags;
@@ -145,6 +145,9 @@ enum i40e_admin_queue_opc {
        i40e_aqc_opc_remove_statistics          = 0x0202,
        i40e_aqc_opc_set_port_parameters        = 0x0203,
        i40e_aqc_opc_get_switch_resource_alloc  = 0x0204,
+       i40e_aqc_opc_set_switch_config          = 0x0205,
+       i40e_aqc_opc_rx_ctl_reg_read            = 0x0206,
+       i40e_aqc_opc_rx_ctl_reg_write           = 0x0207,
 
        i40e_aqc_opc_add_vsi                    = 0x0210,
        i40e_aqc_opc_update_vsi_parameters      = 0x0211,
@@ -220,6 +223,7 @@ enum i40e_admin_queue_opc {
        i40e_aqc_opc_get_phy_wol_caps           = 0x0621,
        i40e_aqc_opc_set_phy_debug              = 0x0622,
        i40e_aqc_opc_upload_ext_phy_fm          = 0x0625,
+       i40e_aqc_opc_run_phy_activity           = 0x0626,
 
        /* NVM commands */
        i40e_aqc_opc_nvm_read                   = 0x0701,
@@ -228,6 +232,7 @@ enum i40e_admin_queue_opc {
        i40e_aqc_opc_nvm_config_read            = 0x0704,
        i40e_aqc_opc_nvm_config_write           = 0x0705,
        i40e_aqc_opc_oem_post_update            = 0x0720,
+       i40e_aqc_opc_thermal_sensor             = 0x0721,
 
        /* virtualization commands */
        i40e_aqc_opc_send_msg_to_pf             = 0x0801,
@@ -399,6 +404,7 @@ struct i40e_aqc_list_capabilities_element_resp {
 #define I40E_AQ_CAP_ID_OS2BMC_CAP      0x0004
 #define I40E_AQ_CAP_ID_FUNCTIONS_VALID 0x0005
 #define I40E_AQ_CAP_ID_ALTERNATE_RAM   0x0006
+#define I40E_AQ_CAP_ID_WOL_AND_PROXY   0x0008
 #define I40E_AQ_CAP_ID_SRIOV           0x0012
 #define I40E_AQ_CAP_ID_VF              0x0013
 #define I40E_AQ_CAP_ID_VMDQ            0x0014
@@ -419,6 +425,7 @@ struct i40e_aqc_list_capabilities_element_resp {
 #define I40E_AQ_CAP_ID_LED             0x0061
 #define I40E_AQ_CAP_ID_SDP             0x0062
 #define I40E_AQ_CAP_ID_MDIO            0x0063
+#define I40E_AQ_CAP_ID_WSR_PROT                0x0064
 #define I40E_AQ_CAP_ID_FLEX10          0x00F1
 #define I40E_AQ_CAP_ID_CEM             0x00F2
 
@@ -677,6 +684,31 @@ struct i40e_aqc_switch_resource_alloc_element_resp {
 
 I40E_CHECK_STRUCT_LEN(0x10, i40e_aqc_switch_resource_alloc_element_resp);
 
+/* Set Switch Configuration (direct 0x0205) */
+struct i40e_aqc_set_switch_config {
+       __le16  flags;
+#define I40E_AQ_SET_SWITCH_CFG_PROMISC         0x0001
+#define I40E_AQ_SET_SWITCH_CFG_L2_FILTER       0x0002
+       __le16  valid_flags;
+       u8      reserved[12];
+};
+
+I40E_CHECK_CMD_LENGTH(i40e_aqc_set_switch_config);
+
+/* Read Receive control registers  (direct 0x0206)
+ * Write Receive control registers (direct 0x0207)
+ *     used for accessing Rx control registers that can be
+ *     slow and need special handling when under high Rx load
+ */
+struct i40e_aqc_rx_ctl_reg_read_write {
+       __le32 reserved1;
+       __le32 address;
+       __le32 reserved2;
+       __le32 value;
+};
+
+I40E_CHECK_CMD_LENGTH(i40e_aqc_rx_ctl_reg_read_write);
+
 /* Add VSI (indirect 0x0210)
  *    this indirect command uses struct i40e_aqc_vsi_properties_data
  *    as the indirect buffer (128 bytes)
@@ -903,7 +935,8 @@ struct i40e_aqc_add_veb {
                                        I40E_AQC_ADD_VEB_PORT_TYPE_SHIFT)
 #define I40E_AQC_ADD_VEB_PORT_TYPE_DEFAULT     0x2
 #define I40E_AQC_ADD_VEB_PORT_TYPE_DATA                0x4
-#define I40E_AQC_ADD_VEB_ENABLE_L2_FILTER      0x8
+#define I40E_AQC_ADD_VEB_ENABLE_L2_FILTER      0x8     /* deprecated */
+#define I40E_AQC_ADD_VEB_ENABLE_DISABLE_STATS  0x10
        u8      enable_tcs;
        u8      reserved[9];
 };
@@ -970,6 +1003,7 @@ struct i40e_aqc_add_macvlan_element_data {
 #define I40E_AQC_MACVLAN_ADD_HASH_MATCH                0x0002
 #define I40E_AQC_MACVLAN_ADD_IGNORE_VLAN       0x0004
 #define I40E_AQC_MACVLAN_ADD_TO_QUEUE          0x0008
+#define I40E_AQC_MACVLAN_ADD_USE_SHARED_MAC    0x0010
        __le16  queue_number;
 #define I40E_AQC_MACVLAN_CMD_QUEUE_SHIFT       0
 #define I40E_AQC_MACVLAN_CMD_QUEUE_MASK                (0x7FF << \
@@ -1066,6 +1100,7 @@ struct i40e_aqc_set_vsi_promiscuous_modes {
 #define I40E_AQC_SET_VSI_PROMISC_BROADCAST     0x04
 #define I40E_AQC_SET_VSI_DEFAULT               0x08
 #define I40E_AQC_SET_VSI_PROMISC_VLAN          0x10
+#define I40E_AQC_SET_VSI_PROMISC_TX            0x8000
        __le16  seid;
 #define I40E_AQC_VSI_PROM_CMD_SEID_MASK                0x3FF
        __le16  vlan_tag;
@@ -1254,10 +1289,16 @@ struct i40e_aqc_add_remove_cloud_filters_element_data {
 
 #define I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT              9
 #define I40E_AQC_ADD_CLOUD_TNL_TYPE_MASK               0x1E00
-#define I40E_AQC_ADD_CLOUD_TNL_TYPE_XVLAN              0
+#define I40E_AQC_ADD_CLOUD_TNL_TYPE_VXLAN              0
 #define I40E_AQC_ADD_CLOUD_TNL_TYPE_NVGRE_OMAC         1
-#define I40E_AQC_ADD_CLOUD_TNL_TYPE_NGE                        2
+#define I40E_AQC_ADD_CLOUD_TNL_TYPE_GENEVE             2
 #define I40E_AQC_ADD_CLOUD_TNL_TYPE_IP                 3
+#define I40E_AQC_ADD_CLOUD_TNL_TYPE_RESERVED           4
+#define I40E_AQC_ADD_CLOUD_TNL_TYPE_VXLAN_GPE          5
+
+#define I40E_AQC_ADD_CLOUD_FLAGS_SHARED_OUTER_MAC      0x2000
+#define I40E_AQC_ADD_CLOUD_FLAGS_SHARED_INNER_MAC      0x4000
+#define I40E_AQC_ADD_CLOUD_FLAGS_SHARED_OUTER_IP       0x8000
 
        __le32  tenant_id;
        u8      reserved[4];
@@ -1752,7 +1793,12 @@ struct i40e_aqc_get_link_status {
        u8      config;
 #define I40E_AQ_CONFIG_CRC_ENA         0x04
 #define I40E_AQ_CONFIG_PACING_MASK     0x78
-       u8      reserved[5];
+       u8      external_power_ability;
+#define I40E_AQ_LINK_POWER_CLASS_1     0x00
+#define I40E_AQ_LINK_POWER_CLASS_2     0x01
+#define I40E_AQ_LINK_POWER_CLASS_3     0x02
+#define I40E_AQ_LINK_POWER_CLASS_4     0x03
+       u8      reserved[4];
 };
 
 I40E_CHECK_CMD_LENGTH(i40e_aqc_get_link_status);
@@ -1820,6 +1866,18 @@ enum i40e_aq_phy_reg_type {
        I40E_AQC_PHY_REG_EXERNAL_MODULE = 0x3
 };
 
+/* Run PHY Activity (0x0626) */
+struct i40e_aqc_run_phy_activity {
+       __le16  activity_id;
+       u8      flags;
+       u8      reserved1;
+       __le32  control;
+       __le32  data;
+       u8      reserved2[4];
+};
+
+I40E_CHECK_CMD_LENGTH(i40e_aqc_run_phy_activity);
+
 /* NVM Read command (indirect 0x0701)
  * NVM Erase commands (direct 0x0702)
  * NVM Update commands (indirect 0x0703)
@@ -1909,6 +1967,22 @@ struct i40e_aqc_nvm_oem_post_update_buffer {
 
 I40E_CHECK_STRUCT_LEN(0x28, i40e_aqc_nvm_oem_post_update_buffer);
 
+/* Thermal Sensor (indirect 0x0721)
+ *     read or set thermal sensor configs and values
+ *     takes a sensor and command specific data buffer, not detailed here
+ */
+struct i40e_aqc_thermal_sensor {
+       u8 sensor_action;
+#define I40E_AQ_THERMAL_SENSOR_READ_CONFIG     0
+#define I40E_AQ_THERMAL_SENSOR_SET_CONFIG      1
+#define I40E_AQ_THERMAL_SENSOR_READ_TEMP       2
+       u8 reserved[7];
+       __le32  addr_high;
+       __le32  addr_low;
+};
+
+I40E_CHECK_CMD_LENGTH(i40e_aqc_thermal_sensor);
+
 /* Send to PF command (indirect 0x0801) id is only used by PF
  * Send to VF command (indirect 0x0802) id is only used by PF
  * Send to Peer PF command (indirect 0x0803)
@@ -2083,6 +2157,7 @@ struct i40e_aqc_add_udp_tunnel {
 #define I40E_AQC_TUNNEL_TYPE_VXLAN     0x00
 #define I40E_AQC_TUNNEL_TYPE_NGE       0x01
 #define I40E_AQC_TUNNEL_TYPE_TEREDO    0x10
+#define I40E_AQC_TUNNEL_TYPE_VXLAN_GPE 0x11
        u8      reserved1[10];
 };