net/mlx4: Cache line CQE/EQE stride fixes
[cascardo/linux.git] / drivers / net / ethernet / mellanox / mlx4 / en_netdev.c
index b7c9978..190cbd9 100644 (file)
@@ -595,7 +595,7 @@ static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
                return 0;
        }
 
-       err = mlx4_qp_reserve_range(dev, 1, 1, qpn);
+       err = mlx4_qp_reserve_range(dev, 1, 1, qpn, MLX4_RESERVE_A0_QP);
        en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
        if (err) {
                en_err(priv, "Failed to reserve qp for mac registration\n");
@@ -1569,8 +1569,15 @@ int mlx4_en_start_port(struct net_device *dev)
                        mlx4_en_free_affinity_hint(priv, i);
                        goto cq_err;
                }
-               for (j = 0; j < cq->size; j++)
-                       cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK;
+
+               for (j = 0; j < cq->size; j++) {
+                       struct mlx4_cqe *cqe = NULL;
+
+                       cqe = mlx4_en_get_cqe(cq->buf, j, priv->cqe_size) +
+                             priv->cqe_factor;
+                       cqe->owner_sr_opcode = MLX4_CQE_OWNER_MASK;
+               }
+
                err = mlx4_en_set_cq_moder(priv, cq);
                if (err) {
                        en_err(priv, "Failed setting cq moderation parameters\n");
@@ -1974,15 +1981,8 @@ int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
 {
        struct mlx4_en_port_profile *prof = priv->prof;
        int i;
-       int err;
        int node;
 
-       err = mlx4_qp_reserve_range(priv->mdev->dev, priv->tx_ring_num, 256, &priv->base_tx_qpn);
-       if (err) {
-               en_err(priv, "failed reserving range for TX rings\n");
-               return err;
-       }
-
        /* Create tx Rings */
        for (i = 0; i < priv->tx_ring_num; i++) {
                node = cpu_to_node(i % num_online_cpus());
@@ -1991,7 +1991,6 @@ int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
                        goto err;
 
                if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i],
-                                          priv->base_tx_qpn + i,
                                           prof->tx_ring_size, TXBB_SIZE,
                                           node, i))
                        goto err;
@@ -2259,7 +2258,7 @@ static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_st
 
 #define PORT_ID_BYTE_LEN 8
 static int mlx4_en_get_phys_port_id(struct net_device *dev,
-                                   struct netdev_phys_port_id *ppid)
+                                   struct netdev_phys_item_id *ppid)
 {
        struct mlx4_en_priv *priv = netdev_priv(dev);
        struct mlx4_dev *mdev = priv->mdev->dev;
@@ -2602,12 +2601,24 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
                        NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
 
        if (mdev->dev->caps.steering_mode ==
-           MLX4_STEERING_MODE_DEVICE_MANAGED)
+           MLX4_STEERING_MODE_DEVICE_MANAGED &&
+           mdev->dev->caps.dmfs_high_steer_mode != MLX4_STEERING_DMFS_A0_STATIC)
                dev->hw_features |= NETIF_F_NTUPLE;
 
        if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
                dev->priv_flags |= IFF_UNICAST_FLT;
 
+       /* Setting a default hash function value */
+       if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP) {
+               priv->rss_hash_fn = ETH_RSS_HASH_TOP;
+       } else if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR) {
+               priv->rss_hash_fn = ETH_RSS_HASH_XOR;
+       } else {
+               en_warn(priv,
+                       "No RSS hash capabilities exposed, using Toeplitz\n");
+               priv->rss_hash_fn = ETH_RSS_HASH_TOP;
+       }
+
        mdev->pndev[port] = dev;
 
        netif_carrier_off(dev);