static char version[] __devinitdata = "de4x5.c:V0.546 2001/02/22 davies@maniac.ultranet.com\n";
#define c_char const char
-#define TWIDDLE(a) (u_short)le16_to_cpu(get_unaligned((u_short *)(a)))
+#define TWIDDLE(a) (u_short)le16_to_cpu(get_unaligned((__le16 *)(a)))
/*
** MII Information
#endif
struct parameters {
- int fdx;
+ bool fdx;
int autosense;
};
/* Multiple of 4 for DC21040 */
/* Allows 512 byte alignment */
struct de4x5_desc {
- volatile s32 status;
- u32 des1;
- u32 buf;
- u32 next;
+ volatile __le32 status;
+ __le32 des1;
+ __le32 buf;
+ __le32 next;
DESC_ALIGN
};
s32 irq_en; /* Summary interrupt bits */
int media; /* Media (eg TP), mode (eg 100B)*/
int c_media; /* Remember the last media conn */
- int fdx; /* media full duplex flag */
+ bool fdx; /* media full duplex flag */
int linkOK; /* Link is OK */
int autosense; /* Allow/disallow autosensing */
- int tx_enable; /* Enable descriptor polling */
+ bool tx_enable; /* Enable descriptor polling */
int setup_f; /* Setup frame filtering type */
int local_state; /* State within a 'media' state */
struct mii_phy phy[DE4X5_MAX_PHY]; /* List of attached PHY devices */
struct de4x5_srom srom; /* A copy of the SROM */
int cfrv; /* Card CFRV copy */
int rx_ovf; /* Check for 'RX overflow' tag */
- int useSROM; /* For non-DEC card use SROM */
- int useMII; /* Infoblock using the MII */
+ bool useSROM; /* For non-DEC card use SROM */
+ bool useMII; /* Infoblock using the MII */
int asBitValid; /* Autosense bits in GEP? */
int asPolarity; /* 0 => asserted high */
int asBit; /* Autosense bit number in GEP */
static int test_media(struct net_device *dev, s32 irqs, s32 irq_mask, s32 csr13, s32 csr14, s32 csr15, s32 msec);
static int test_for_100Mb(struct net_device *dev, int msec);
static int wait_for_link(struct net_device *dev);
-static int test_mii_reg(struct net_device *dev, int reg, int mask, int pol, long msec);
+static int test_mii_reg(struct net_device *dev, int reg, int mask, bool pol, long msec);
static int is_spd_100(struct net_device *dev);
static int is_100_up(struct net_device *dev);
static int is_10_up(struct net_device *dev);
struct de4x5_private *lp = netdev_priv(dev);
struct pci_dev *pdev = NULL;
int i, status=0;
+ DECLARE_MAC_BUF(mac);
gendev->driver_data = dev;
/*
** Now find out what kind of DC21040/DC21041/DC21140 board we have.
*/
- lp->useSROM = FALSE;
+ lp->useSROM = false;
if (lp->bus == PCI) {
PCI_signature(name, lp);
} else {
dev->base_addr = iobase;
printk ("%s: %s at 0x%04lx", gendev->bus_id, name, iobase);
- printk(", h/w address ");
status = get_hw_addr(dev);
- for (i = 0; i < ETH_ALEN - 1; i++) { /* get the ethernet addr. */
- printk("%2.2x:", dev->dev_addr[i]);
- }
- printk("%2.2x,\n", dev->dev_addr[i]);
+ printk(", h/w address %s\n", print_mac(mac, dev->dev_addr));
if (status != 0) {
printk(" which has an Ethernet PROM CRC error.\n");
lp->cache.gepc = GEP_INIT;
lp->asBit = GEP_SLNK;
lp->asPolarity = GEP_SLNK;
- lp->asBitValid = TRUE;
+ lp->asBitValid = ~0;
lp->timeout = -1;
lp->gendev = gendev;
spin_lock_init(&lp->lock);
sprintf(lp->adapter_name,"%s (%s)", name, gendev->bus_id);
lp->dma_size = (NUM_RX_DESC + NUM_TX_DESC) * sizeof(struct de4x5_desc);
-#if defined(__alpha__) || defined(__powerpc__) || defined(__sparc_v9__) || defined(DE4X5_DO_MEMCPY)
+#if defined(__alpha__) || defined(__powerpc__) || defined(CONFIG_SPARC) || defined(DE4X5_DO_MEMCPY)
lp->dma_size += RX_BUFF_SZ * NUM_RX_DESC + DE4X5_ALIGN;
#endif
lp->rx_ring = dma_alloc_coherent(gendev, lp->dma_size,
** Set up the RX descriptor ring (Intels)
** Allocate contiguous receive buffers, long word aligned (Alphas)
*/
-#if !defined(__alpha__) && !defined(__powerpc__) && !defined(__sparc_v9__) && !defined(DE4X5_DO_MEMCPY)
+#if !defined(__alpha__) && !defined(__powerpc__) && !defined(CONFIG_SPARC) && !defined(DE4X5_DO_MEMCPY)
for (i=0; i<NUM_RX_DESC; i++) {
lp->rx_ring[i].status = 0;
lp->rx_ring[i].des1 = cpu_to_le32(RX_BUFF_SZ);
mii_get_phy(dev);
}
-#ifndef __sparc_v9__
printk(" and requires IRQ%d (provided by %s).\n", dev->irq,
-#else
- printk(" and requires IRQ%x (provided by %s).\n", dev->irq,
-#endif
((lp->bus == PCI) ? "PCI BIOS" : "EISA CNFG"));
}
}
/* The DE4X5-specific entries in the device structure. */
- SET_MODULE_OWNER(dev);
SET_NETDEV_DEV(dev, gendev);
dev->open = &de4x5_open;
dev->hard_start_xmit = &de4x5_queue_pkt;
u_long flags = 0;
netif_stop_queue(dev);
- if (lp->tx_enable == NO) { /* Cannot send for now */
+ if (!lp->tx_enable) { /* Cannot send for now */
return -1;
}
u_short vendor, status;
u_int irq = 0, device;
u_long iobase = 0; /* Clear upper 32 bits in Alphas */
- int i, j, cfrv;
+ int i, j;
struct de4x5_private *lp = netdev_priv(dev);
struct list_head *walk;
/* Get the chip configuration revision register */
pb = this_dev->bus->number;
- pci_read_config_dword(this_dev, PCI_REVISION_ID, &cfrv);
/* Set the device number information */
lp->device = PCI_SLOT(this_dev->devfn);
/* Set the chipset information */
if (is_DC2114x) {
- device = ((cfrv & CFRV_RN) < DC2114x_BRK ? DC21142 : DC21143);
+ device = ((this_dev->revision & CFRV_RN) < DC2114x_BRK
+ ? DC21142 : DC21143);
}
lp->chipset = device;
}
/* Get the chip configuration revision register */
- pci_read_config_dword(pdev, PCI_REVISION_ID, &lp->cfrv);
+ lp->cfrv = pdev->revision;
/* Set the device number information */
lp->device = dev_num;
switch (lp->media) {
case INIT:
DISABLE_IRQs;
- lp->tx_enable = NO;
+ lp->tx_enable = false;
lp->timeout = -1;
de4x5_save_skbs(dev);
if ((lp->autosense == AUTO) || (lp->autosense == TP)) {
lp->c_media = lp->media;
}
lp->media = INIT;
- lp->tx_enable = NO;
+ lp->tx_enable = false;
break;
}
switch (lp->media) {
case INIT:
DISABLE_IRQs;
- lp->tx_enable = NO;
+ lp->tx_enable = false;
lp->timeout = -1;
de4x5_save_skbs(dev); /* Save non transmitted skb's */
if ((lp->autosense == AUTO) || (lp->autosense == TP_NW)) {
lp->c_media = lp->media;
}
lp->media = INIT;
- lp->tx_enable = NO;
+ lp->tx_enable = false;
break;
}
case INIT:
if (lp->timeout < 0) {
DISABLE_IRQs;
- lp->tx_enable = FALSE;
+ lp->tx_enable = false;
lp->linkOK = 0;
de4x5_save_skbs(dev); /* Save non transmitted skb's */
}
if (lp->timeout < 0) {
mii_wr(MII_CR_ASSE | MII_CR_RAN, MII_CR, lp->phy[lp->active].addr, DE4X5_MII);
}
- cr = test_mii_reg(dev, MII_CR, MII_CR_RAN, FALSE, 500);
+ cr = test_mii_reg(dev, MII_CR, MII_CR_RAN, false, 500);
if (cr < 0) {
next_tick = cr & ~TIMER_CB;
} else {
break;
case 1:
- if ((sr=test_mii_reg(dev, MII_SR, MII_SR_ASSC, TRUE, 2000)) < 0) {
+ if ((sr=test_mii_reg(dev, MII_SR, MII_SR_ASSC, true, 2000)) < 0) {
next_tick = sr & ~TIMER_CB;
} else {
lp->media = SPD_DET;
if (!(anlpa & MII_ANLPA_RF) &&
(cap = anlpa & MII_ANLPA_TAF & ana)) {
if (cap & MII_ANA_100M) {
- lp->fdx = ((ana & anlpa & MII_ANA_FDAM & MII_ANA_100M) ? TRUE : FALSE);
+ lp->fdx = (ana & anlpa & MII_ANA_FDAM & MII_ANA_100M) != 0;
lp->media = _100Mb;
} else if (cap & MII_ANA_10M) {
- lp->fdx = ((ana & anlpa & MII_ANA_FDAM & MII_ANA_10M) ? TRUE : FALSE);
+ lp->fdx = (ana & anlpa & MII_ANA_FDAM & MII_ANA_10M) != 0;
lp->media = _10Mb;
}
lp->c_media = lp->media;
}
lp->media = INIT;
- lp->tx_enable = FALSE;
+ lp->tx_enable = false;
break;
}
case INIT:
if (lp->timeout < 0) {
DISABLE_IRQs;
- lp->tx_enable = FALSE;
+ lp->tx_enable = false;
lp->linkOK = 0;
lp->timeout = -1;
de4x5_save_skbs(dev); /* Save non transmitted skb's */
if (lp->timeout < 0) {
mii_wr(MII_CR_ASSE | MII_CR_RAN, MII_CR, lp->phy[lp->active].addr, DE4X5_MII);
}
- cr = test_mii_reg(dev, MII_CR, MII_CR_RAN, FALSE, 500);
+ cr = test_mii_reg(dev, MII_CR, MII_CR_RAN, false, 500);
if (cr < 0) {
next_tick = cr & ~TIMER_CB;
} else {
break;
case 1:
- if ((sr=test_mii_reg(dev, MII_SR, MII_SR_ASSC, TRUE, 2000)) < 0) {
+ sr = test_mii_reg(dev, MII_SR, MII_SR_ASSC, true, 2000);
+ if (sr < 0) {
next_tick = sr & ~TIMER_CB;
} else {
lp->media = SPD_DET;
if (!(anlpa & MII_ANLPA_RF) &&
(cap = anlpa & MII_ANLPA_TAF & ana)) {
if (cap & MII_ANA_100M) {
- lp->fdx = ((ana & anlpa & MII_ANA_FDAM & MII_ANA_100M) ? TRUE : FALSE);
+ lp->fdx = (ana & anlpa & MII_ANA_FDAM & MII_ANA_100M) != 0;
lp->media = _100Mb;
} else if (cap & MII_ANA_10M) {
- lp->fdx = ((ana & anlpa & MII_ANA_FDAM & MII_ANA_10M) ? TRUE : FALSE);
+ lp->fdx = (ana & anlpa & MII_ANA_FDAM & MII_ANA_10M) != 0;
lp->media = _10Mb;
}
}
{
struct de4x5_private *lp = netdev_priv(dev);
- lp->fdx = 0;
+ lp->fdx = false;
if (lp->infoblock_media == lp->media)
return 0;
switch(lp->infoblock_media) {
case SROM_10BASETF:
if (!lp->params.fdx) return -1;
- lp->fdx = TRUE;
+ lp->fdx = true;
case SROM_10BASET:
if (lp->params.fdx && !lp->fdx) return -1;
if ((lp->chipset == DC21140) || ((lp->chipset & ~0x00ff) == DC2114x)) {
case SROM_100BASETF:
if (!lp->params.fdx) return -1;
- lp->fdx = TRUE;
+ lp->fdx = true;
case SROM_100BASET:
if (lp->params.fdx && !lp->fdx) return -1;
lp->media = _100Mb;
case SROM_100BASEFF:
if (!lp->params.fdx) return -1;
- lp->fdx = TRUE;
+ lp->fdx = true;
case SROM_100BASEF:
if (lp->params.fdx && !lp->fdx) return -1;
lp->media = _100Mb;
spin_lock_irqsave(&lp->lock, flags);
de4x5_rst_desc_ring(dev);
de4x5_setup_intr(dev);
- lp->tx_enable = YES;
+ lp->tx_enable = true;
spin_unlock_irqrestore(&lp->lock, flags);
outl(POLL_DEMAND, DE4X5_TPD);
}
}
if (lp->useMII) {
- next_tick = test_mii_reg(dev, MII_CR, MII_CR_RST, FALSE, 500);
+ next_tick = test_mii_reg(dev, MII_CR, MII_CR_RST, false, 500);
}
} else if (lp->chipset == DC21140) {
PHY_HARD_RESET;
**
*/
static int
-test_mii_reg(struct net_device *dev, int reg, int mask, int pol, long msec)
+test_mii_reg(struct net_device *dev, int reg, int mask, bool pol, long msec)
{
struct de4x5_private *lp = netdev_priv(dev);
int test;
lp->timeout = msec/100;
}
- if (pol) pol = ~0;
reg = mii_rd((u_char)reg, lp->phy[lp->active].addr, DE4X5_MII) & mask;
- test = (reg ^ pol) & mask;
+ test = (reg ^ (pol ? ~0 : 0)) & mask;
if (test && --lp->timeout) {
reg = 100 | TIMER_CB;
struct de4x5_private *lp = netdev_priv(dev);
struct sk_buff *p;
-#if !defined(__alpha__) && !defined(__powerpc__) && !defined(__sparc_v9__) && !defined(DE4X5_DO_MEMCPY)
+#if !defined(__alpha__) && !defined(__powerpc__) && !defined(CONFIG_SPARC) && !defined(DE4X5_DO_MEMCPY)
struct sk_buff *ret;
u_long i=0, tmp;
p = dev_alloc_skb(IEEE802_3_SZ + DE4X5_ALIGN + 2);
if (!p) return NULL;
- p->dev = dev;
tmp = virt_to_bus(p->data);
i = ((tmp + DE4X5_ALIGN) & ~DE4X5_ALIGN) - tmp;
skb_reserve(p, i);
p = dev_alloc_skb(len + 2);
if (!p) return NULL;
- p->dev = dev;
skb_reserve(p, 2); /* Align */
if (index < lp->rx_old) { /* Wrapped buffer */
short tlen = (lp->rxRingSize - lp->rx_old) * RX_BUFF_SZ;
static int
EISA_signature(char *name, struct device *device)
{
- int i, status = 0, siglen = sizeof(de4x5_signatures)/sizeof(c_char *);
+ int i, status = 0, siglen = ARRAY_SIZE(de4x5_signatures);
struct eisa_device *edev;
*name = '\0';
static int
PCI_signature(char *name, struct de4x5_private *lp)
{
- int i, status = 0, siglen = sizeof(de4x5_signatures)/sizeof(c_char *);
+ int i, status = 0, siglen = ARRAY_SIZE(de4x5_signatures);
if (lp->chipset == DC21040) {
strcpy(name, "DE434/5");
)))))));
}
if (lp->chipset != DC21041) {
- lp->useSROM = TRUE; /* card is not recognisably DEC */
+ lp->useSROM = true; /* card is not recognisably DEC */
}
} else if ((lp->chipset & ~0x00ff) == DC2114x) {
- lp->useSROM = TRUE;
+ lp->useSROM = true;
}
return status;
memset((char *)&lp->srom, 0, sizeof(struct de4x5_srom));
memcpy(lp->srom.ieee_addr, (char *)dev->dev_addr, ETH_ALEN);
memcpy(lp->srom.info, (char *)&srom_repair_info[SMC-1], 100);
- lp->useSROM = TRUE;
+ lp->useSROM = true;
break;
}
if (lp->chipset == infoleaf_array[i].chipset) break;
}
if (i == INFOLEAF_SIZE) {
- lp->useSROM = FALSE;
+ lp->useSROM = false;
printk("%s: Cannot find correct chipset for SROM decoding!\n",
dev->name);
return -ENXIO;
if (lp->device == *p) break;
}
if (i == 0) {
- lp->useSROM = FALSE;
+ lp->useSROM = false;
printk("%s: Cannot find correct PCI device [%d] for SROM decoding!\n",
dev->name, lp->device);
return -ENXIO;
}
lp->media = INIT;
lp->tcount = 0;
- lp->tx_enable = FALSE;
+ lp->tx_enable = false;
}
return next_tick & ~TIMER_CB;
}
lp->media = INIT;
lp->tcount = 0;
- lp->tx_enable = FALSE;
+ lp->tx_enable = false;
}
return next_tick & ~TIMER_CB;
}
lp->media = INIT;
lp->tcount = 0;
- lp->tx_enable = FALSE;
+ lp->tx_enable = false;
}
return next_tick & ~TIMER_CB;
lp->asBit = 1 << ((csr6 >> 1) & 0x07);
lp->asPolarity = ((csr6 & 0x80) ? -1 : 0) & lp->asBit;
lp->infoblock_csr6 = OMR_DEF | ((csr6 & 0x71) << 18);
- lp->useMII = FALSE;
+ lp->useMII = false;
de4x5_switch_mac_port(dev);
}
lp->asBit = 1 << ((csr6 >> 1) & 0x07);
lp->asPolarity = ((csr6 & 0x80) ? -1 : 0) & lp->asBit;
lp->infoblock_csr6 = OMR_DEF | ((csr6 & 0x71) << 18);
- lp->useMII = FALSE;
+ lp->useMII = false;
de4x5_switch_mac_port(dev);
}
lp->ibn = 1;
lp->active = *p;
lp->infoblock_csr6 = OMR_MII_100;
- lp->useMII = TRUE;
+ lp->useMII = true;
lp->infoblock_media = ANS;
de4x5_switch_mac_port(dev);
lp->cache.gepc = ((s32)(TWIDDLE(p)) << 16); p += 2;
lp->cache.gep = ((s32)(TWIDDLE(p)) << 16);
lp->infoblock_csr6 = OMR_SIA;
- lp->useMII = FALSE;
+ lp->useMII = false;
de4x5_switch_mac_port(dev);
}
lp->active = *p;
if (MOTO_SROM_BUG) lp->active = 0;
lp->infoblock_csr6 = OMR_MII_100;
- lp->useMII = TRUE;
+ lp->useMII = true;
lp->infoblock_media = ANS;
de4x5_switch_mac_port(dev);
lp->asBit = 1 << ((csr6 >> 1) & 0x07);
lp->asPolarity = ((csr6 & 0x80) ? -1 : 0) & lp->asBit;
lp->infoblock_csr6 = OMR_DEF | ((csr6 & 0x71) << 18);
- lp->useMII = FALSE;
+ lp->useMII = false;
de4x5_switch_mac_port(dev);
}
{
struct de4x5_private *lp = netdev_priv(dev);
u_long iobase = dev->base_addr;
- int i, j, k, n, limit=sizeof(phy_info)/sizeof(struct phy_table);
+ int i, j, k, n, limit=ARRAY_SIZE(phy_info);
int id;
lp->active = 0;
- lp->useMII = TRUE;
+ lp->useMII = true;
/* Search the MII address space for possible PHY devices */
for (n=0, lp->mii_cnt=0, i=1; !((i==1) && (n==1)); i=(i+1)%DE4X5_MAX_MII) {
de4x5_dbg_mii(dev, k);
}
}
- if (!lp->mii_cnt) lp->useMII = FALSE;
+ if (!lp->mii_cnt) lp->useMII = false;
return lp->mii_cnt;
}
de4x5_dbg_srom(struct de4x5_srom *p)
{
int i;
+ DECLARE_MAC_BUF(mac);
if (de4x5_debug & DEBUG_SROM) {
printk("Sub-system Vendor ID: %04x\n", *((u_short *)p->sub_vendor_id));
printk("Sub-system ID: %04x\n", *((u_short *)p->sub_system_id));
printk("ID Block CRC: %02x\n", (u_char)(p->id_block_crc));
printk("SROM version: %02x\n", (u_char)(p->version));
- printk("# controllers: %02x\n", (u_char)(p->num_controllers));
+ printk("# controllers: %02x\n", (u_char)(p->num_controllers));
- printk("Hardware Address: ");
- for (i=0;i<ETH_ALEN-1;i++) {
- printk("%02x:", (u_char)*(p->ieee_addr+i));
- }
- printk("%02x\n", (u_char)*(p->ieee_addr+i));
+ printk("Hardware Address: %s\n", print_mac(mac, p->ieee_addr));
printk("CRC checksum: %04x\n", (u_short)(p->chksum));
for (i=0; i<64; i++) {
printk("%3d %04x\n", i<<1, (u_short)*((u_short *)p+i));
de4x5_dbg_rx(struct sk_buff *skb, int len)
{
int i, j;
+ DECLARE_MAC_BUF(mac);
+ DECLARE_MAC_BUF(mac2);
if (de4x5_debug & DEBUG_RX) {
- printk("R: %02x:%02x:%02x:%02x:%02x:%02x <- %02x:%02x:%02x:%02x:%02x:%02x len/SAP:%02x%02x [%d]\n",
- (u_char)skb->data[0],
- (u_char)skb->data[1],
- (u_char)skb->data[2],
- (u_char)skb->data[3],
- (u_char)skb->data[4],
- (u_char)skb->data[5],
- (u_char)skb->data[6],
- (u_char)skb->data[7],
- (u_char)skb->data[8],
- (u_char)skb->data[9],
- (u_char)skb->data[10],
- (u_char)skb->data[11],
+ printk("R: %s <- %s len/SAP:%02x%02x [%d]\n",
+ print_mac(mac, skb->data), print_mac(mac2, &skb->data[6]),
(u_char)skb->data[12],
(u_char)skb->data[13],
len);
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