ah->config.dma_beacon_response_time = 1;
ah->config.sw_beacon_response_time = 6;
- ah->config.cwm_ignore_extcca = 0;
+ ah->config.cwm_ignore_extcca = false;
ah->config.analog_shiftreg = 1;
ah->config.rx_intr_mitigation = true;
else
nextTbtt = bs->bs_nexttbtt;
- ath_dbg(common, BEACON, "next DTIM %d\n", bs->bs_nextdtim);
- ath_dbg(common, BEACON, "next beacon %d\n", nextTbtt);
- ath_dbg(common, BEACON, "beacon period %d\n", beaconintval);
- ath_dbg(common, BEACON, "DTIM period %d\n", dtimperiod);
+ ath_dbg(common, BEACON, "next DTIM %u\n", bs->bs_nextdtim);
+ ath_dbg(common, BEACON, "next beacon %u\n", nextTbtt);
+ ath_dbg(common, BEACON, "beacon period %u\n", beaconintval);
+ ath_dbg(common, BEACON, "DTIM period %u\n", dtimperiod);
ENABLE_REGWRITE_BUFFER(ah);
ENABLE_REGWRITE_BUFFER(ah);
- if (AR_SREV_9462(ah) || AR_SREV_9565(ah))
- bits |= ATH9K_RX_FILTER_CONTROL_WRAPPER;
-
REG_WRITE(ah, AR_RX_FILTER, bits);
phybits = 0;