pinctrl: exynos: Add AUDIO pin controller for exynos7

[cascardo/linux.git] / drivers / pinctrl / samsung / pinctrl-exynos.c

diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
index d5d4cfc..c8f83f9 100644 (file)
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -174,7 +174,7 @@ static int exynos_irq_request_resources(struct irq_data *irqd)
        unsigned int con;
        int ret;
 
-       ret = gpio_lock_as_irq(&bank->gpio_chip, irqd->hwirq);
+       ret = gpiochip_lock_as_irq(&bank->gpio_chip, irqd->hwirq);
        if (ret) {
                dev_err(bank->gpio_chip.dev, "unable to lock pin %s-%lu IRQ\n",
                        bank->name, irqd->hwirq);
@@ -227,7 +227,7 @@ static void exynos_irq_release_resources(struct irq_data *irqd)
 
        spin_unlock_irqrestore(&bank->slock, flags);
 
-       gpio_unlock_as_irq(&bank->gpio_chip, irqd->hwirq);
+       gpiochip_unlock_as_irq(&bank->gpio_chip, irqd->hwirq);
 }
 
 /*
@@ -1300,6 +1300,25 @@ static const struct samsung_pin_bank_data exynos7_pin_banks7[] __initconst = {
        EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpr3", 0x0c),
 };
 
+/* pin banks of exynos7 pin-controller - BUS1 */
+static const struct samsung_pin_bank_data exynos7_pin_banks8[] __initconst = {
+       EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpf0", 0x00),
+       EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpf1", 0x04),
+       EXYNOS_PIN_BANK_EINTG(4, 0x060, "gpf2", 0x08),
+       EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpf3", 0x0c),
+       EXYNOS_PIN_BANK_EINTG(8, 0x0a0, "gpf4", 0x10),
+       EXYNOS_PIN_BANK_EINTG(8, 0x0c0, "gpf5", 0x14),
+       EXYNOS_PIN_BANK_EINTG(5, 0x0e0, "gpg1", 0x18),
+       EXYNOS_PIN_BANK_EINTG(5, 0x100, "gpg2", 0x1c),
+       EXYNOS_PIN_BANK_EINTG(6, 0x120, "gph1", 0x20),
+       EXYNOS_PIN_BANK_EINTG(3, 0x140, "gpv6", 0x24),
+};
+
+static const struct samsung_pin_bank_data exynos7_pin_banks9[] __initconst = {
+       EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpz0", 0x00),
+       EXYNOS_PIN_BANK_EINTG(4, 0x020, "gpz1", 0x04),
+};
+
 const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = {
        {
                /* pin-controller instance 0 Alive data */
@@ -1342,5 +1361,15 @@ const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = {
                .pin_banks      = exynos7_pin_banks7,
                .nr_banks       = ARRAY_SIZE(exynos7_pin_banks7),
                .eint_gpio_init = exynos_eint_gpio_init,
+       }, {
+               /* pin-controller instance 8 BUS1 data */
+               .pin_banks      = exynos7_pin_banks8,
+               .nr_banks       = ARRAY_SIZE(exynos7_pin_banks8),
+               .eint_gpio_init = exynos_eint_gpio_init,
+       }, {
+               /* pin-controller instance 9 AUD data */
+               .pin_banks      = exynos7_pin_banks9,
+               .nr_banks       = ARRAY_SIZE(exynos7_pin_banks9),
+               .eint_gpio_init = exynos_eint_gpio_init,
        },
 };