timers/nohz: Capitalize 'CPU' consistently
[cascardo/linux.git] / drivers / rtc / rtc-ds1307.c
index ecb7dba..821d9c0 100644 (file)
@@ -275,9 +275,13 @@ static s32 ds1307_native_smbus_write_block_data(const struct i2c_client *client,
 {
        u8 suboffset = 0;
 
-       if (length <= I2C_SMBUS_BLOCK_MAX)
-               return i2c_smbus_write_i2c_block_data(client,
+       if (length <= I2C_SMBUS_BLOCK_MAX) {
+               s32 retval = i2c_smbus_write_i2c_block_data(client,
                                        command, length, values);
+               if (retval < 0)
+                       return retval;
+               return length;
+       }
 
        while (suboffset < length) {
                s32 retval = i2c_smbus_write_i2c_block_data(client,
@@ -538,12 +542,8 @@ static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
        buf[5] = 0;
        buf[6] = 0;
 
-       /* optionally enable ALARM1 */
+       /* disable alarms */
        buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
-       if (t->enabled) {
-               dev_dbg(dev, "alarm IRQ armed\n");
-               buf[7] |= DS1337_BIT_A1IE;      /* only ALARM1 is used */
-       }
        buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
 
        ret = ds1307->write_block_data(client,
@@ -553,6 +553,13 @@ static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
                return ret;
        }
 
+       /* optionally enable ALARM1 */
+       if (t->enabled) {
+               dev_dbg(dev, "alarm IRQ armed\n");
+               buf[7] |= DS1337_BIT_A1IE;      /* only ALARM1 is used */
+               i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, buf[7]);
+       }
+
        return 0;
 }
 
@@ -1144,12 +1151,10 @@ static struct clk_init_data ds3231_clks_init[] = {
        [DS3231_CLK_SQW] = {
                .name = "ds3231_clk_sqw",
                .ops = &ds3231_clk_sqw_ops,
-               .flags = CLK_IS_ROOT,
        },
        [DS3231_CLK_32KHZ] = {
                .name = "ds3231_clk_32khz",
                .ops = &ds3231_clk_32khz_ops,
-               .flags = CLK_IS_ROOT,
        },
 };