[SCSI] ipr: Bump version

[cascardo/linux.git] / drivers / serial / ip22zilog.c

diff --git a/drivers/serial/ip22zilog.c b/drivers/serial/ip22zilog.c
index 66f117d..6517724 100644 (file)
--- a/drivers/serial/ip22zilog.c
+++ b/drivers/serial/ip22zilog.c
@@ -215,7 +215,7 @@ static void __load_zsregs(struct zilog_channel *channel, unsigned char *regs)
        /* Lower and upper byte of baud rate generator divisor.  */
        write_zsreg(channel, R12, regs[R12]);
        write_zsreg(channel, R13, regs[R13]);
-       
+
        /* Now rewrite R14, with BRENAB (if set).  */
        write_zsreg(channel, R14, regs[R14]);
 
@@ -420,10 +420,8 @@ static void ip22zilog_transmit_chars(struct uart_ip22zilog_port *up,
        if (up->port.info == NULL)
                goto ack_tx_int;
        xmit = &up->port.info->xmit;
-       if (uart_circ_empty(xmit)) {
-               uart_write_wakeup(&up->port);
+       if (uart_circ_empty(xmit))
                goto ack_tx_int;
-       }
        if (uart_tx_stopped(&up->port))
                goto ack_tx_int;
 
@@ -571,7 +569,7 @@ static void ip22zilog_set_mctrl(struct uart_port *port, unsigned int mctrl)
        else
                clear_bits |= DTR;
 
-       /* NOTE: Not subject to 'transmitter active' rule.  */ 
+       /* NOTE: Not subject to 'transmitter active' rule.  */
        up->curregs[R5] |= set_bits;
        up->curregs[R5] &= ~clear_bits;
        write_zsreg(channel, R5, up->curregs[R5]);
@@ -654,7 +652,7 @@ static void ip22zilog_enable_ms(struct uart_port *port)
        if (new_reg != up->curregs[R15]) {
                up->curregs[R15] = new_reg;
 
-               /* NOTE: Not subject to 'transmitter active' rule.  */ 
+               /* NOTE: Not subject to 'transmitter active' rule.  */
                write_zsreg(channel, R15, up->curregs[R15]);
        }
 }
@@ -680,7 +678,7 @@ static void ip22zilog_break_ctl(struct uart_port *port, int break_state)
        if (new_reg != up->curregs[R5]) {
                up->curregs[R5] = new_reg;
 
-               /* NOTE: Not subject to 'transmitter active' rule.  */ 
+               /* NOTE: Not subject to 'transmitter active' rule.  */
                write_zsreg(channel, R5, up->curregs[R5]);
        }
 
@@ -969,8 +967,9 @@ static struct zilog_layout * __init get_zs(int chip)
 #define ZS_PUT_CHAR_MAX_DELAY  2000    /* 10 ms */
 
 #ifdef CONFIG_SERIAL_IP22_ZILOG_CONSOLE
-static void ip22zilog_put_char(struct zilog_channel *channel, unsigned char ch)
+static void ip22zilog_put_char(struct uart_port *port, int ch)
 {
+       struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(port);
        int loops = ZS_PUT_CHAR_MAX_DELAY;
 
        /* This is a timed polling loop so do not switch the explicit
@@ -994,16 +993,10 @@ static void
 ip22zilog_console_write(struct console *con, const char *s, unsigned int count)
 {
        struct uart_ip22zilog_port *up = &ip22zilog_port_table[con->index];
-       struct zilog_channel *channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
        unsigned long flags;
-       int i;
 
        spin_lock_irqsave(&up->port.lock, flags);
-       for (i = 0; i < count; i++, s++) {
-               ip22zilog_put_char(channel, *s);
-               if (*s == 10)
-                       ip22zilog_put_char(channel, 13);
-       }
+       uart_console_write(&up->port, s, count, ip22zilog_put_char);
        udelay(2);
        spin_unlock_irqrestore(&up->port.lock, flags);
 }