case COUNTRY_CODE_MKK1:
case COUNTRY_CODE_ISRAEL:
case COUNTRY_CODE_TELEC:
- case COUNTRY_CODE_MIC:
+ case COUNTRY_CODE_MIC:
Dot11d_Init(ieee);
ieee->bGlobalDomain = false;
//actually 8225 & 8256 rf chips only support B,G,24N mode
Dot11d_Reset(ieee);
ieee->bGlobalDomain = true;
break;
-
+
default:
break;
}
}
-#define rx_hal_is_cck_rate(_pdrvinfo)\
- (_pdrvinfo->RxRate == DESC90_RATE1M ||\
- _pdrvinfo->RxRate == DESC90_RATE2M ||\
- _pdrvinfo->RxRate == DESC90_RATE5_5M ||\
- _pdrvinfo->RxRate == DESC90_RATE11M) &&\
- !_pdrvinfo->RxHT\
void CamResetAllEntry(struct net_device *dev)
u32 read_cam(struct net_device *dev, u8 addr)
{
+ u32 data;
+
write_nic_dword(dev, RWCAM, 0x80000000|(addr&0xff));
- return read_nic_dword(dev, 0xa8);
+ read_nic_dword(dev, 0xa8, &data);
+ return data;
}
void write_nic_byte_E(struct net_device *dev, int indx, u8 data)
netdev_err(dev, "write_nic_byte_E TimeOut! status: %d\n", status);
}
-u8 read_nic_byte_E(struct net_device *dev, int indx)
+int read_nic_byte_E(struct net_device *dev, int indx, u8 *data)
{
int status;
- u8 data;
struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
struct usb_device *udev = priv->udev;
status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
- indx|0xfe00, 0, &data, 1, HZ / 2);
+ indx|0xfe00, 0, data, 1, HZ / 2);
- if (status < 0)
- netdev_err(dev, "read_nic_byte_E TimeOut! status: %d\n", status);
+ if (status < 0) {
+ netdev_err(dev, "%s failure status: %d\n", __func__, status);
+ return status;
+ }
- return data;
+ return 0;
}
//as 92U has extend page from 4 to 16, so modify functions below.
void write_nic_byte(struct net_device *dev, int indx, u8 data)
-u8 read_nic_byte(struct net_device *dev, int indx)
+int read_nic_byte(struct net_device *dev, int indx, u8 *data)
{
- u8 data;
int status;
struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
struct usb_device *udev = priv->udev;
status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
- (indx&0xff)|0xff00, (indx>>8)&0x0f, &data, 1, HZ / 2);
+ (indx&0xff)|0xff00, (indx>>8)&0x0f, data, 1, HZ / 2);
- if (status < 0)
- netdev_err(dev, "read_nic_byte TimeOut! status: %d\n", status);
+ if (status < 0) {
+ netdev_err(dev, "%s failure status: %d\n", __func__, status);
+ return status;
+ }
- return data;
+ return 0;
}
-u16 read_nic_word(struct net_device *dev, int indx)
+int read_nic_word(struct net_device *dev, int indx, u16 *data)
{
- u16 data;
int status;
struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
struct usb_device *udev = priv->udev;
status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
(indx&0xff)|0xff00, (indx>>8)&0x0f,
- &data, 2, HZ / 2);
+ data, 2, HZ / 2);
- if (status < 0)
- netdev_err(dev, "read_nic_word TimeOut! status: %d\n", status);
+ if (status < 0) {
+ netdev_err(dev, "%s failure status: %d\n", __func__, status);
+ return status;
+ }
- return data;
+ return 0;
}
-u16 read_nic_word_E(struct net_device *dev, int indx)
+int read_nic_word_E(struct net_device *dev, int indx, u16 *data)
{
- u16 data;
int status;
struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
struct usb_device *udev = priv->udev;
status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
- indx|0xfe00, 0, &data, 2, HZ / 2);
+ indx|0xfe00, 0, data, 2, HZ / 2);
- if (status < 0)
- netdev_err(dev, "read_nic_word TimeOut! status: %d\n", status);
+ if (status < 0) {
+ netdev_err(dev, "%s failure status: %d\n", __func__, status);
+ return status;
+ }
- return data;
+ return 0;
}
-u32 read_nic_dword(struct net_device *dev, int indx)
+int read_nic_dword(struct net_device *dev, int indx, u32 *data)
{
- u32 data;
int status;
struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
status = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
RTL8187_REQ_GET_REGS, RTL8187_REQT_READ,
(indx&0xff)|0xff00, (indx>>8)&0x0f,
- &data, 4, HZ / 2);
+ data, 4, HZ / 2);
- if (status < 0)
- netdev_err(dev, "read_nic_dword TimeOut! status:%d\n", status);
+ if (status < 0) {
+ netdev_err(dev, "%s failure status: %d\n", __func__, status);
+ return status;
+ }
- return data;
+ return 0;
}
/* u8 read_phy_cck(struct net_device *dev, u8 adr); */
{
struct net_device *dev = m->private;
int i, n, max = 0xff;
+ u8 byte_rd;
seq_puts(m, "\n####################page 0##################\n ");
for (n = 0; n <= max;) {
seq_printf(m, "\nD: %2x > ", n);
- for (i = 0; i < 16 && n <= max; i++, n++)
- seq_printf(m, "%2x ", read_nic_byte(dev, 0x000|n));
+ for (i = 0; i < 16 && n <= max; i++, n++) {
+ read_nic_byte(dev, 0x000|n, &byte_rd);
+ seq_printf(m, "%2x ", byte_rd);
+ }
}
seq_puts(m, "\n####################page 1##################\n ");
for (n = 0; n <= max;) {
seq_printf(m, "\nD: %2x > ", n);
- for (i = 0; i < 16 && n <= max; i++, n++)
- seq_printf(m, "%2x ", read_nic_byte(dev, 0x100|n));
+ for (i = 0; i < 16 && n <= max; i++, n++) {
+ read_nic_byte(dev, 0x100|n, &byte_rd);
+ seq_printf(m, "%2x ", byte_rd);
+ }
}
seq_puts(m, "\n####################page 3##################\n ");
for (n = 0; n <= max;) {
seq_printf(m, "\nD: %2x > ", n);
- for (i = 0; i < 16 && n <= max; i++, n++)
- seq_printf(m, "%2x ", read_nic_byte(dev, 0x300|n));
+ for (i = 0; i < 16 && n <= max; i++, n++) {
+ read_nic_byte(dev, 0x300|n, &byte_rd);
+ seq_printf(m, "%2x ", byte_rd);
+ }
}
seq_putc(m, '\n');
void rtl8192_set_mode(struct net_device *dev, int mode)
{
u8 ecmd;
- ecmd = read_nic_byte(dev, EPROM_CMD);
+ read_nic_byte(dev, EPROM_CMD, &ecmd);
ecmd = ecmd & ~EPROM_CMD_OPERATING_MODE_MASK;
ecmd = ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
- ecmd = ecmd & ~(1<<EPROM_CS_SHIFT);
- ecmd = ecmd & ~(1<<EPROM_CK_SHIFT);
+ ecmd = ecmd & ~EPROM_CS_BIT;
+ ecmd = ecmd & ~EPROM_CK_BIT;
write_nic_byte(dev, EPROM_CMD, ecmd);
}
struct r8192_priv *priv = ieee80211_priv(dev);
u8 msr;
- msr = read_nic_byte(dev, MSR);
+ read_nic_byte(dev, MSR, &msr);
msr &= ~MSR_LINK_MASK;
/* do not change in link_state != WLAN_LINK_ASSOCIATED.
struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
u32 rxconf;
- rxconf = read_nic_dword(dev, RCR);
+ read_nic_dword(dev, RCR, &rxconf);
rxconf = rxconf & ~MAC_FILTER_MASK;
rxconf = rxconf | RCR_AMF;
rxconf = rxconf | RCR_ADF;
rxconf = rxconf | RCR_ONLYERLPKT;
write_nic_dword(dev, RCR, rxconf);
-
-#ifdef DEBUG_RX
- DMESG("rxconf: %x %x", rxconf, read_nic_dword(dev, RCR));
-#endif
}
//wait to be removed
void rtl8192_rx_enable(struct net_device *dev)
struct sk_buff *skb;
struct rtl8192_rx_info *info;
- cmd = read_nic_byte(dev, CMDR);
+ read_nic_byte(dev, CMDR, &cmd);
write_nic_byte(dev, CMDR, cmd & ~(CR_TE|CR_RE));
force_pci_posting(dev);
mdelay(10);
u8 queue_index = tcb_desc->queue_index;
/* shall not be referred by command packet */
- assert(queue_index != TXCMD_QUEUE);
+ RTL8192U_ASSERT(queue_index != TXCMD_QUEUE);
spin_lock_irqsave(&priv->tx_lock, flags);
/* Subframe drv Tx descriptor and firmware info setting */
skb = pSendList->tx_agg_frames[i];
tcb_desc = (cb_desc *)(skb->cb + MAX_DEV_ADDR_SIZE);
- tx_agg_desc = (tx_desc_819x_usb_aggr_subframe *)agg_skb->tail;
- tx_fwinfo = (tx_fwinfo_819x_usb *)(agg_skb->tail + sizeof(tx_desc_819x_usb_aggr_subframe));
+ tx_agg_desc = (tx_desc_819x_usb_aggr_subframe *)skb_tail_pointer(agg_skb);
+ tx_fwinfo = (tx_fwinfo_819x_usb *)(skb_tail_pointer(agg_skb) + sizeof(tx_desc_819x_usb_aggr_subframe));
memset(tx_fwinfo, 0, sizeof(tx_fwinfo_819x_usb));
/* DWORD 0 */
- tx_fwinfo->TxHT = (tcb_desc->data_rate&0x80)?1:0;
+ tx_fwinfo->TxHT = (tcb_desc->data_rate&0x80) ? 1 : 0;
tx_fwinfo->TxRate = MRateToHwRate8190Pci(tcb_desc->data_rate);
tx_fwinfo->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
tx_fwinfo->Short = QueryIsShort(tx_fwinfo->TxHT, tx_fwinfo->TxRate, tcb_desc);
}
/* Protection mode related */
- tx_fwinfo->RtsEnable = (tcb_desc->bRTSEnable)?1:0;
- tx_fwinfo->CtsEnable = (tcb_desc->bCTSEnable)?1:0;
- tx_fwinfo->RtsSTBC = (tcb_desc->bRTSSTBC)?1:0;
- tx_fwinfo->RtsHT = (tcb_desc->rts_rate&0x80)?1:0;
+ tx_fwinfo->RtsEnable = (tcb_desc->bRTSEnable) ? 1 : 0;
+ tx_fwinfo->CtsEnable = (tcb_desc->bCTSEnable) ? 1 : 0;
+ tx_fwinfo->RtsSTBC = (tcb_desc->bRTSSTBC) ? 1 : 0;
+ tx_fwinfo->RtsHT = (tcb_desc->rts_rate&0x80) ? 1 : 0;
tx_fwinfo->RtsRate = MRateToHwRate8190Pci((u8)tcb_desc->rts_rate);
- tx_fwinfo->RtsSubcarrier = (tx_fwinfo->RtsHT == 0)?(tcb_desc->RTSSC):0;
- tx_fwinfo->RtsBandwidth = (tx_fwinfo->RtsHT == 1)?((tcb_desc->bRTSBW)?1:0):0;
- tx_fwinfo->RtsShort = (tx_fwinfo->RtsHT == 0)?(tcb_desc->bRTSUseShortPreamble?1:0):
- (tcb_desc->bRTSUseShortGI?1:0);
+ tx_fwinfo->RtsSubcarrier = (tx_fwinfo->RtsHT == 0) ? (tcb_desc->RTSSC) : 0;
+ tx_fwinfo->RtsBandwidth = (tx_fwinfo->RtsHT == 1) ? ((tcb_desc->bRTSBW) ? 1 : 0) : 0;
+ tx_fwinfo->RtsShort = (tx_fwinfo->RtsHT == 0) ? (tcb_desc->bRTSUseShortPreamble ? 1 : 0) :
+ (tcb_desc->bRTSUseShortGI ? 1 : 0);
/* Set Bandwidth and sub-channel settings. */
if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40) {
/* Handle MPDU in wait queue. */
if (queue_index != BEACON_QUEUE) {
/* Don't send data frame during scanning.*/
- if ((skb_queue_len(&priv->ieee80211->skb_waitQ[queue_index]) != 0)&&
+ if ((skb_queue_len(&priv->ieee80211->skb_waitQ[queue_index]) != 0) &&
(!(priv->ieee80211->queue_stop))) {
if (NULL != (skb = skb_dequeue(&(priv->ieee80211->skb_waitQ[queue_index]))))
priv->ieee80211->softmac_hard_start_xmit(skb, dev);
return; //modified by david to avoid further processing AMSDU
}
#ifdef USB_TX_DRIVER_AGGREGATION_ENABLE
- else if ((skb_queue_len(&priv->ieee80211->skb_drv_aggQ[queue_index]) != 0)&&
+ else if ((skb_queue_len(&priv->ieee80211->skb_drv_aggQ[queue_index]) != 0) &&
(!(priv->ieee80211->queue_stop))) {
// Tx Driver Aggregation process
/* The driver will aggregation the packets according to the following stats
u8 msr, msrm, msr2;
struct r8192_priv *priv = ieee80211_priv(dev);
- msr = read_nic_byte(dev, MSR);
+ read_nic_byte(dev, MSR, &msr);
msrm = msr & MSR_LINK_MASK;
msr2 = msr & ~MSR_LINK_MASK;
struct r8192_priv *priv = ieee80211_priv(dev);
struct ieee80211_network *net;
u8 i = 0, basic_rate = 0;
- net = & priv->ieee80211->current_network;
+ net = &priv->ieee80211->current_network;
for (i = 0; i < net->rates_len; i++) {
basic_rate = net->rates[i]&0x7f;
if (net->mode & (IEEE_G|IEEE_N_24G)) {
u8 slot_time = 0;
- if ((cap & WLAN_CAPABILITY_SHORT_SLOT)&&(!priv->ieee80211->pHTInfo->bCurrentRT2RTLongSlotTime)) //short slot time
+ if ((cap & WLAN_CAPABILITY_SHORT_SLOT) && (!priv->ieee80211->pHTInfo->bCurrentRT2RTLongSlotTime)) //short slot time
slot_time = SHORT_SLOT_TIME;
else //long slot time
slot_time = NON_SHORT_SLOT_TIME;
struct ieee80211_network *net;
u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
u16 rate_config = 0;
- net = & priv->ieee80211->current_network;
+ net = &priv->ieee80211->current_network;
rtl8192_config_rate(dev, &rate_config);
priv->basic_rate = rate_config &= 0x15f;
else // Short preamble
FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
if ((FrameLength*8 % (DataRate/10)) != 0) //Get the Ceilling
- FrameTime ++;
+ FrameTime++;
} else { //802.11g DSSS-OFDM PLCP length field calculation.
N_DBPS = N_DBPSOfRate(DataRate);
Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
{
u8 tmp_Short;
- tmp_Short = (TxHT == 1)?((tcb_desc->bUseShortGI)?1:0):((tcb_desc->bUseShortPreamble)?1:0);
+ tmp_Short = (TxHT == 1) ? ((tcb_desc->bUseShortGI) ? 1 : 0) : ((tcb_desc->bUseShortPreamble) ? 1 : 0);
if (TxHT == 1 && TxRate != DESC90_RATEMCS15)
tmp_Short = 0;
/* Fill Tx firmware info */
memset(tx_fwinfo, 0, sizeof(tx_fwinfo_819x_usb));
/* DWORD 0 */
- tx_fwinfo->TxHT = (tcb_desc->data_rate&0x80)?1:0;
+ tx_fwinfo->TxHT = (tcb_desc->data_rate&0x80) ? 1 : 0;
tx_fwinfo->TxRate = MRateToHwRate8190Pci(tcb_desc->data_rate);
tx_fwinfo->EnableCPUDur = tcb_desc->bTxEnableFwCalcDur;
tx_fwinfo->Short = QueryIsShort(tx_fwinfo->TxHT, tx_fwinfo->TxRate, tcb_desc);
}
/* Protection mode related */
- tx_fwinfo->RtsEnable = (tcb_desc->bRTSEnable)?1:0;
- tx_fwinfo->CtsEnable = (tcb_desc->bCTSEnable)?1:0;
- tx_fwinfo->RtsSTBC = (tcb_desc->bRTSSTBC)?1:0;
- tx_fwinfo->RtsHT = (tcb_desc->rts_rate&0x80)?1:0;
+ tx_fwinfo->RtsEnable = (tcb_desc->bRTSEnable) ? 1 : 0;
+ tx_fwinfo->CtsEnable = (tcb_desc->bCTSEnable) ? 1 : 0;
+ tx_fwinfo->RtsSTBC = (tcb_desc->bRTSSTBC) ? 1 : 0;
+ tx_fwinfo->RtsHT = (tcb_desc->rts_rate&0x80) ? 1 : 0;
tx_fwinfo->RtsRate = MRateToHwRate8190Pci((u8)tcb_desc->rts_rate);
- tx_fwinfo->RtsSubcarrier = (tx_fwinfo->RtsHT == 0)?(tcb_desc->RTSSC):0;
- tx_fwinfo->RtsBandwidth = (tx_fwinfo->RtsHT == 1)?((tcb_desc->bRTSBW)?1:0):0;
- tx_fwinfo->RtsShort = (tx_fwinfo->RtsHT == 0)?(tcb_desc->bRTSUseShortPreamble?1:0):
- (tcb_desc->bRTSUseShortGI?1:0);
+ tx_fwinfo->RtsSubcarrier = (tx_fwinfo->RtsHT == 0) ? (tcb_desc->RTSSC) : 0;
+ tx_fwinfo->RtsBandwidth = (tx_fwinfo->RtsHT == 1) ? ((tcb_desc->bRTSBW) ? 1 : 0) : 0;
+ tx_fwinfo->RtsShort = (tx_fwinfo->RtsHT == 0) ? (tcb_desc->bRTSUseShortPreamble ? 1 : 0) :
+ (tcb_desc->bRTSUseShortGI ? 1 : 0);
/* Set Bandwidth and sub-channel settings. */
if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40) {
/*update timing params*/
if (ieee->iw_mode == IW_MODE_INFRA || ieee->iw_mode == IW_MODE_ADHOC) {
u32 reg = 0;
- reg = read_nic_dword(dev, RCR);
+ read_nic_dword(dev, RCR, ®);
if (priv->ieee80211->state == IEEE80211_LINKED)
priv->ReceiveConfig = reg |= RCR_CBSSID;
else
/* update the ac parameter to related registers */
for (i = 0; i < QOS_QUEUE_NUM; i++) {
//Mode G/A: slotTimeTimer = 9; Mode B: 20
- u1bAIFS = qos_parameters->aifs[i] * ((mode&(IEEE_G|IEEE_N_24G)) ?9:20) + aSifsTime;
+ u1bAIFS = qos_parameters->aifs[i] * ((mode&(IEEE_G|IEEE_N_24G)) ? 9 : 20) + aSifsTime;
u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[i]))<< AC_PARAM_TXOP_LIMIT_OFFSET)|
(((u32)(qos_parameters->cw_max[i]))<< AC_PARAM_ECW_MAX_OFFSET)|
(((u32)(qos_parameters->cw_min[i]))<< AC_PARAM_ECW_MIN_OFFSET)|
priv->ieee80211->rts = DEFAULT_RTS_THRESHOLD;
priv->ieee80211->rate = 110; //11 mbps
priv->ieee80211->short_slot = 1;
- priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
+ priv->promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
priv->CckPwEnl = 6;
//for silent reset
priv->IrpPendingCount = 1;
(TCR_MXDMA_2048<<TCR_MXDMA_OFFSET)| // Max DMA Burst Size per Tx DMA Burst, 7: reserved.
(priv->ShortRetryLimit<<TCR_SRL_OFFSET)| // Short retry limit
(priv->LongRetryLimit<<TCR_LRL_OFFSET) | // Long retry limit
- (false ? TCR_SAT: 0); // FALSE: HW provides PLCP length and LENGEXT, TRUE: SW provides them
+ (false ? TCR_SAT : 0); // FALSE: HW provides PLCP length and LENGEXT, TRUE: SW provides them
#ifdef TO_DO_LIST
if (Adapter->bInHctTest)
pHalData->ReceiveConfig = pHalData->CSMethod |
RCR_AICV | RCR_ACRC32 | //accept ICV/CRC error packet
((u32)7<<RCR_MXDMA_OFFSET) | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
(pHalData->EarlyRxThreshold<<RCR_FIFO_OFFSET) | // Rx FIFO Threshold, 7: No Rx threshold.
- (pHalData->EarlyRxThreshold == 7 ? RCR_OnlyErlPkt:0);
+ (pHalData->EarlyRxThreshold == 7 ? RCR_OnlyErlPkt : 0);
else
#endif
RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
((u32)7<<RCR_MXDMA_OFFSET)| // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
(priv->EarlyRxThreshold<<RX_FIFO_THRESHOLD_SHIFT) | // Rx FIFO Threshold, 7: No Rx threshold.
- (priv->EarlyRxThreshold == 7 ? RCR_ONLYERLPKT:0);
+ (priv->EarlyRxThreshold == 7 ? RCR_ONLYERLPKT : 0);
priv->AcmControl = 0;
priv->pFirmware = kzalloc(sizeof(rt_firmware), GFP_KERNEL);
u16 curCR = 0;
struct r8192_priv *priv = ieee80211_priv(dev);
RT_TRACE(COMP_EPROM, "===========>%s()\n", __func__);
- curCR = read_nic_word_E(dev, EPROM_CMD);
+ read_nic_word_E(dev, EPROM_CMD, &curCR);
RT_TRACE(COMP_EPROM, "read from Reg EPROM_CMD(%x):%x\n", EPROM_CMD, curCR);
//whether need I consider BIT5?
priv->epromtype = (curCR & Cmd9346CR_9356SEL) ? EPROM_93c56 : EPROM_93c46;
ratr_value &= ~(RATE_ALL_OFDM_2SS);
write_nic_dword(dev, RATR0, ratr_value);
write_nic_byte(dev, UFWP, 1);
- regTmp = read_nic_byte(dev, 0x313);
+ read_nic_byte(dev, 0x313, ®Tmp);
regRRSR = ((regTmp) << 24) | (regRRSR & 0x00ffffff);
write_nic_dword(dev, RRSR, regRRSR);
u32 dwRegRead = 0;
bool init_status = true;
u8 SECR_value = 0x0;
+ u8 tmp;
RT_TRACE(COMP_INIT, "====>%s()\n", __func__);
priv->Rf_Mode = RF_OP_By_SW_3wire;
//for ASIC power on sequence
priv->pFirmware->firmware_status = FW_STATUS_0_INIT;
//config CPUReset Register
//Firmware Reset or not?
- dwRegRead = read_nic_dword(dev, CPU_GEN);
+ read_nic_dword(dev, CPU_GEN, &dwRegRead);
if (priv->pFirmware->firmware_status == FW_STATUS_0_INIT)
dwRegRead |= CPU_GEN_SYSTEM_RESET; //do nothing here?
else if (priv->pFirmware->firmware_status == FW_STATUS_5_READY)
//Loopback mode or not
priv->LoopbackMode = RTL819xU_NO_LOOPBACK;
- dwRegRead = read_nic_dword(dev, CPU_GEN);
+ read_nic_dword(dev, CPU_GEN, &dwRegRead);
if (priv->LoopbackMode == RTL819xU_NO_LOOPBACK)
dwRegRead = ((dwRegRead & CPU_GEN_NO_LOOPBACK_MSK) | CPU_GEN_NO_LOOPBACK_SET);
else if (priv->LoopbackMode == RTL819xU_MAC_LOOPBACK)
udelay(500);
//xiong add for new bitfile:usb suspend reset pin set to 1. //do we need?
- write_nic_byte_E(dev, 0x5f, (read_nic_byte_E(dev, 0x5f)|0x20));
+ read_nic_byte_E(dev, 0x5f, &tmp);
+ write_nic_byte_E(dev, 0x5f, tmp|0x20);
//Set Hardware
rtl8192_hwconfig(dev);
if (priv->ResetProgress == RESET_TYPE_NORESET) {
//if D or C cut
- u8 tmpvalue = read_nic_byte(dev, 0x301);
+ u8 tmpvalue;
+ read_nic_byte(dev, 0x301, &tmpvalue);
if (tmpvalue == 0x03) {
priv->bDcut = TRUE;
RT_TRACE(COMP_POWER_TRACKING, "D-cut\n");
bool HalTxCheckStuck819xUsb(struct net_device *dev)
{
struct r8192_priv *priv = ieee80211_priv(dev);
- u16 RegTxCounter = read_nic_word(dev, 0x128);
+ u16 RegTxCounter;
bool bStuck = FALSE;
+ read_nic_word(dev, 0x128, &RegTxCounter);
RT_TRACE(COMP_RESET, "%s():RegTxCounter is %d,TxCounter is %d\n", __func__, RegTxCounter, priv->TxCounter);
if (priv->TxCounter == RegTxCounter)
bStuck = TRUE;
// Decide such threshold according to current power save mode
//
- for (QueueID = 0; QueueID <= BEACON_QUEUE; QueueID ++) {
+ for (QueueID = 0; QueueID <= BEACON_QUEUE; QueueID++) {
if (QueueID == TXCMD_QUEUE)
continue;
#ifdef USB_TX_DRIVER_AGGREGATION_ENABLE
bool HalRxCheckStuck819xUsb(struct net_device *dev)
{
- u16 RegRxCounter = read_nic_word(dev, 0x130);
+ u16 RegRxCounter;
struct r8192_priv *priv = ieee80211_priv(dev);
bool bStuck = FALSE;
static u8 rx_chk_cnt;
+ read_nic_word(dev, 0x130, &RegRxCounter);
RT_TRACE(COMP_RESET, "%s(): RegRxCounter is %d,RxCounter is %d\n", __func__, RegRxCounter, priv->RxCounter);
// If rssi is small, we should check rx for long time because of bad rx.
// or maybe it will continuous silent reset every 2 seconds.
if (priv->undecorated_smoothed_pwdb >= (RateAdaptiveTH_High+5)) {
rx_chk_cnt = 0; //high rssi, check rx stuck right now.
} else if (priv->undecorated_smoothed_pwdb < (RateAdaptiveTH_High+5) &&
- ((priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb >= RateAdaptiveTH_Low_40M) ||
- (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb >= RateAdaptiveTH_Low_20M))) {
+ ((priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20 && priv->undecorated_smoothed_pwdb >= RateAdaptiveTH_Low_40M) ||
+ (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20 && priv->undecorated_smoothed_pwdb >= RateAdaptiveTH_Low_20M))) {
if (rx_chk_cnt < 2)
return bStuck;
else
rx_chk_cnt = 0;
- } else if (((priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb < RateAdaptiveTH_Low_40M) ||
- (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20&&priv->undecorated_smoothed_pwdb < RateAdaptiveTH_Low_20M)) &&
+ } else if (((priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20 && priv->undecorated_smoothed_pwdb < RateAdaptiveTH_Low_40M) ||
+ (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20 && priv->undecorated_smoothed_pwdb < RateAdaptiveTH_Low_20M)) &&
priv->undecorated_smoothed_pwdb >= VeryLowRSSI) {
if (rx_chk_cnt < 4)
return bStuck;
RT_TRACE(COMP_SEC, "CamRestoreAllEntry: \n");
- if ((priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP40)||
+ if ((priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP40) ||
(priv->ieee80211->pairwise_key_type == KEY_TYPE_WEP104)) {
for (EntryId = 0; EntryId < 4; EntryId++) {
//Check polling bit is clear
while ((i--) >= 0) {
- ulStatus = read_nic_dword(dev, RWCAM);
+ read_nic_dword(dev, RWCAM, &ulStatus);
if (ulStatus & BIT31)
continue;
else
}
write_nic_dword(dev, RWCAM, target_command);
RT_TRACE(COMP_SEC, "CAM_read_entry(): WRITE A0: %x \n", target_command);
- target_content = read_nic_dword(dev, RCAMO);
+ read_nic_dword(dev, RCAMO, &target_content);
RT_TRACE(COMP_SEC, "CAM_read_entry(): WRITE A8: %x \n", target_content);
}
printk("\n");
/* FIXME FIXME */
- promisc = (dev->flags & IFF_PROMISC) ? 1:0;
+ promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
if (promisc != priv->promisc)
// Check PWDB.
//
RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
- pprevious_stats->bIsCCK? "CCK": "OFDM",
+ pprevious_stats->bIsCCK ? "CCK" : "OFDM",
pprevious_stats->RxPWDBAll);
if (pprevious_stats->bPacketBeacon) {
}
RT_TRACE(COMP_RXDESC, "Smooth %s PWDB = %d\n",
- pprevious_stats->bIsCCK? "CCK": "OFDM",
+ pprevious_stats->bIsCCK ? "CCK" : "OFDM",
pprevious_stats->RxPWDBAll);
return retsig;
}
+static inline bool rx_hal_is_cck_rate(struct rx_drvinfo_819x_usb *pdrvinfo)
+{
+ if (pdrvinfo->RxHT)
+ return false;
+
+ switch (pdrvinfo->RxRate) {
+ case DESC90_RATE1M:
+ case DESC90_RATE2M:
+ case DESC90_RATE5_5M:
+ case DESC90_RATE11M:
+ return true;
+ default:
+ return false;
+ }
+}
+
static void rtl8192_query_rxphystatus(struct r8192_priv *priv,
struct ieee80211_rx_stats *pstats,
rx_drvinfo_819x_usb *pdrvinfo,
/* Check if the received packet is acceptable. */
bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) &&
- (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS)? hdr->addr2 : hdr->addr3))
- && (!pstats->bHwError) && (!pstats->bCRC)&& (!pstats->bICV));
+ (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS) ? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ? hdr->addr2 : hdr->addr3))
+ && (!pstats->bHwError) && (!pstats->bCRC) && (!pstats->bICV));
bpacket_toself = bpacket_match_bssid & (eqMacAddr(praddr, priv->ieee80211->dev->dev_addr));
if (WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BEACON)
projects / cascardo / linux.git / blobdiff