ASoC: mediatek: HDMI audio LR channel swapped

[cascardo/linux.git] / sound / soc / mediatek / mtk-afe-pcm.c

diff --git a/sound/soc/mediatek/mtk-afe-pcm.c b/sound/soc/mediatek/mtk-afe-pcm.c
index 08af9f5..2b5df2e 100644 (file)
--- a/sound/soc/mediatek/mtk-afe-pcm.c
+++ b/sound/soc/mediatek/mtk-afe-pcm.c
@@ -21,6 +21,7 @@
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
+#include <linux/dma-mapping.h>
 #include <linux/pm_runtime.h>
 #include <sound/soc.h>
 #include "mtk-afe-common.h"
@@ -35,9 +36,11 @@
 #define AFE_I2S_CON1           0x0034
 #define AFE_I2S_CON2           0x0038
 #define AFE_CONN_24BIT         0x006c
+#define AFE_MEMIF_MSB          0x00cc
 
 #define AFE_CONN1              0x0024
 #define AFE_CONN2              0x0028
+#define AFE_CONN3              0x002c
 #define AFE_CONN7              0x0460
 #define AFE_CONN8              0x0464
 #define AFE_HDMI_CONN0         0x0390
@@ -61,6 +64,7 @@
 #define AFE_HDMI_OUT_CUR       0x0378
 #define AFE_HDMI_OUT_END       0x037c
 
+#define AFE_ADDA_TOP_CON0      0x0120
 #define AFE_ADDA2_TOP_CON0     0x0600
 
 #define AFE_HDMI_OUT_CON0      0x0370
@@ -119,6 +123,7 @@
 #define AFE_TDM_CON1_WLEN_32BIT                (0x2 << 8)
 #define AFE_TDM_CON1_MSB_ALIGNED       (0x1 << 4)
 #define AFE_TDM_CON1_1_BCK_DELAY       (0x1 << 3)
+#define AFE_TDM_CON1_LRCK_INV          (0x1 << 2)
 #define AFE_TDM_CON1_BCK_INV           (0x1 << 1)
 #define AFE_TDM_CON1_EN                        (0x1 << 0)
 
@@ -257,6 +262,7 @@ static int mtk_afe_set_i2s(struct mtk_afe *afe, unsigned int rate)
                return -EINVAL;
 
        /* from external ADC */
+       regmap_update_bits(afe->regmap, AFE_ADDA_TOP_CON0, 0x1, 0x1);
        regmap_update_bits(afe->regmap, AFE_ADDA2_TOP_CON0, 0x1, 0x1);
 
        /* set input */
@@ -281,20 +287,13 @@ static void mtk_afe_set_i2s_enable(struct mtk_afe *afe, bool enable)
 
        regmap_read(afe->regmap, AFE_I2S_CON2, &val);
        if (!!(val & AFE_I2S_CON2_EN) == enable)
-               return; /* must skip soft reset */
-
-       /* I2S soft reset begin */
-       regmap_update_bits(afe->regmap, AUDIO_TOP_CON1, 0x4, 0x4);
+               return;
 
        /* input */
        regmap_update_bits(afe->regmap, AFE_I2S_CON2, 0x1, enable);
 
        /* output */
        regmap_update_bits(afe->regmap, AFE_I2S_CON1, 0x1, enable);
-
-       /* I2S soft reset end */
-       udelay(1);
-       regmap_update_bits(afe->regmap, AUDIO_TOP_CON1, 0x4, 0);
 }
 
 static int mtk_afe_dais_enable_clks(struct mtk_afe *afe,
@@ -363,6 +362,7 @@ static int mtk_afe_i2s_startup(struct snd_pcm_substream *substream,
                return 0;
 
        mtk_afe_dais_enable_clks(afe, afe->clocks[MTK_CLK_I2S1_M], NULL);
+       mtk_afe_dais_enable_clks(afe, afe->clocks[MTK_CLK_I2S2_M], NULL);
        regmap_update_bits(afe->regmap, AUDIO_TOP_CON0,
                           AUD_TCON0_PDN_22M | AUD_TCON0_PDN_24M, 0);
        return 0;
@@ -382,6 +382,7 @@ static void mtk_afe_i2s_shutdown(struct snd_pcm_substream *substream,
                           AUD_TCON0_PDN_22M | AUD_TCON0_PDN_24M,
                           AUD_TCON0_PDN_22M | AUD_TCON0_PDN_24M);
        mtk_afe_dais_disable_clks(afe, afe->clocks[MTK_CLK_I2S1_M], NULL);
+       mtk_afe_dais_disable_clks(afe, afe->clocks[MTK_CLK_I2S2_M], NULL);
 }
 
 static int mtk_afe_i2s_prepare(struct snd_pcm_substream *substream,
@@ -395,6 +396,9 @@ static int mtk_afe_i2s_prepare(struct snd_pcm_substream *substream,
        mtk_afe_dais_set_clks(afe,
                              afe->clocks[MTK_CLK_I2S1_M], runtime->rate * 256,
                              NULL, 0);
+       mtk_afe_dais_set_clks(afe,
+                             afe->clocks[MTK_CLK_I2S2_M], runtime->rate * 256,
+                             NULL, 0);
        /* config I2S */
        ret = mtk_afe_set_i2s(afe, substream->runtime->rate);
        if (ret)
@@ -446,6 +450,7 @@ static int mtk_afe_hdmi_prepare(struct snd_pcm_substream *substream,
                              runtime->rate * runtime->channels * 32);
 
        val = AFE_TDM_CON1_BCK_INV |
+             AFE_TDM_CON1_LRCK_INV |
              AFE_TDM_CON1_1_BCK_DELAY |
              AFE_TDM_CON1_MSB_ALIGNED | /* I2S mode */
              AFE_TDM_CON1_WLEN_32BIT |
@@ -592,6 +597,7 @@ static int mtk_afe_dais_hw_params(struct snd_pcm_substream *substream,
        struct snd_soc_pcm_runtime *rtd = substream->private_data;
        struct mtk_afe *afe = snd_soc_platform_get_drvdata(rtd->platform);
        struct mtk_afe_memif *memif = &afe->memif[rtd->cpu_dai->id];
+       int msb_at_bit33 = 0;
        int ret;
 
        dev_dbg(afe->dev,
@@ -603,7 +609,8 @@ static int mtk_afe_dais_hw_params(struct snd_pcm_substream *substream,
        if (ret < 0)
                return ret;
 
-       memif->phys_buf_addr = substream->runtime->dma_addr;
+       msb_at_bit33 = upper_32_bits(substream->runtime->dma_addr) ? 1 : 0;
+       memif->phys_buf_addr = lower_32_bits(substream->runtime->dma_addr);
        memif->buffer_size = substream->runtime->dma_bytes;
 
        /* start */
@@ -614,6 +621,11 @@ static int mtk_afe_dais_hw_params(struct snd_pcm_substream *substream,
                     memif->data->reg_ofs_base + AFE_BASE_END_OFFSET,
                     memif->phys_buf_addr + memif->buffer_size - 1);
 
+       /* set MSB to 33-bit */
+       regmap_update_bits(afe->regmap, AFE_MEMIF_MSB,
+                          1 << memif->data->msb_shift,
+                          msb_at_bit33 << memif->data->msb_shift);
+
        /* set channel */
        if (memif->data->mono_shift >= 0) {
                unsigned int mono = (params_channels(params) == 1) ? 1 : 0;
@@ -894,15 +906,19 @@ static const struct snd_kcontrol_new mtk_afe_o04_mix[] = {
 };
 
 static const struct snd_kcontrol_new mtk_afe_o09_mix[] = {
+       SOC_DAPM_SINGLE_AUTODISABLE("I03 Switch", AFE_CONN3, 0, 1, 0),
        SOC_DAPM_SINGLE_AUTODISABLE("I17 Switch", AFE_CONN7, 30, 1, 0),
 };
 
 static const struct snd_kcontrol_new mtk_afe_o10_mix[] = {
+       SOC_DAPM_SINGLE_AUTODISABLE("I04 Switch", AFE_CONN3, 3, 1, 0),
        SOC_DAPM_SINGLE_AUTODISABLE("I18 Switch", AFE_CONN8, 0, 1, 0),
 };
 
 static const struct snd_soc_dapm_widget mtk_afe_pcm_widgets[] = {
        /* inter-connections */
+       SND_SOC_DAPM_MIXER("I03", SND_SOC_NOPM, 0, 0, NULL, 0),
+       SND_SOC_DAPM_MIXER("I04", SND_SOC_NOPM, 0, 0, NULL, 0),
        SND_SOC_DAPM_MIXER("I05", SND_SOC_NOPM, 0, 0, NULL, 0),
        SND_SOC_DAPM_MIXER("I06", SND_SOC_NOPM, 0, 0, NULL, 0),
        SND_SOC_DAPM_MIXER("I17", SND_SOC_NOPM, 0, 0, NULL, 0),
@@ -925,12 +941,16 @@ static const struct snd_soc_dapm_route mtk_afe_pcm_routes[] = {
        {"I2S Playback", NULL, "O04"},
        {"VUL", NULL, "O09"},
        {"VUL", NULL, "O10"},
+       {"I03", NULL, "I2S Capture"},
+       {"I04", NULL, "I2S Capture"},
        {"I17", NULL, "I2S Capture"},
        {"I18", NULL, "I2S Capture"},
        { "O03", "I05 Switch", "I05" },
        { "O04", "I06 Switch", "I06" },
        { "O09", "I17 Switch", "I17" },
+       { "O09", "I03 Switch", "I03" },
        { "O10", "I18 Switch", "I18" },
+       { "O10", "I04 Switch", "I04" },
 };
 
 static const struct snd_soc_dapm_route mtk_afe_hdmi_routes[] = {
@@ -978,6 +998,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = {
                .irq_en_shift = 0,
                .irq_fs_shift = 4,
                .irq_clr_shift = 0,
+               .msb_shift = 0,
        }, {
                .name = "DL2",
                .id = MTK_AFE_MEMIF_DL2,
@@ -991,6 +1012,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = {
                .irq_en_shift = 2,
                .irq_fs_shift = 16,
                .irq_clr_shift = 2,
+               .msb_shift = 1,
        }, {
                .name = "VUL",
                .id = MTK_AFE_MEMIF_VUL,
@@ -1004,6 +1026,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = {
                .irq_en_shift = 1,
                .irq_fs_shift = 8,
                .irq_clr_shift = 1,
+               .msb_shift = 6,
        }, {
                .name = "DAI",
                .id = MTK_AFE_MEMIF_DAI,
@@ -1017,6 +1040,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = {
                .irq_en_shift = 3,
                .irq_fs_shift = 20,
                .irq_clr_shift = 3,
+               .msb_shift = 5,
        }, {
                .name = "AWB",
                .id = MTK_AFE_MEMIF_AWB,
@@ -1030,6 +1054,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = {
                .irq_en_shift = 14,
                .irq_fs_shift = 24,
                .irq_clr_shift = 6,
+               .msb_shift = 3,
        }, {
                .name = "MOD_DAI",
                .id = MTK_AFE_MEMIF_MOD_DAI,
@@ -1043,6 +1068,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = {
                .irq_en_shift = 3,
                .irq_fs_shift = 20,
                .irq_clr_shift = 3,
+               .msb_shift = 4,
        }, {
                .name = "HDMI",
                .id = MTK_AFE_MEMIF_HDMI,
@@ -1056,6 +1082,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = {
                .irq_en_shift = 12,
                .irq_fs_shift = -1,
                .irq_clr_shift = 4,
+               .msb_shift = 8,
        },
 };
 
@@ -1189,6 +1216,10 @@ static int mtk_afe_pcm_dev_probe(struct platform_device *pdev)
        struct mtk_afe *afe;
        struct resource *res;
 
+       ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(33));
+       if (ret)
+               return ret;
+
        afe = devm_kzalloc(&pdev->dev, sizeof(*afe), GFP_KERNEL);
        if (!afe)
                return -ENOMEM;