X-Git-Url: http://git.cascardo.info/?a=blobdiff_plain;f=arch%2Farm%2Fboot%2Fdts%2Fste-nomadik-stn8815.dtsi;h=d2d532a9d78322fcbc2b532918d7acb01b507cb2;hb=fed41f7d039bad02f94cad9059e4b14cd81d13f2;hp=e2be533430642e1a1ab3fd736db6b54d8c4cf954;hpb=c8d6a77b5850dbf910e68ffe2054a6503ee2af47;p=cascardo%2Flinux.git diff --git a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi index e2be53343064..adb1c0998b81 100644 --- a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi +++ b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi @@ -166,6 +166,24 @@ }; }; }; + clcd { + /* + * This should be activated to use the additional + * 8 lines for bits 16 thru 23 from the CLCD block. + */ + clcd_24bit_mux: clcd_mux { + clcd_24bit_mux { + function = "clcd"; + groups = "clcd_16_23_b_1"; + }; + }; + }; + }; + + /* Power Management Unit */ + pmu: pmu@101e9000 { + compatible = "stericsson,nomadik-pmu", "syscon"; + reg = <0x101e0000 0x1000>; }; src: src@101e0000 { @@ -726,6 +744,16 @@ #size-cells = <1>; ranges; + clcd@10120000 { + compatible = "arm,pl110", "arm,primecell"; + reg = <0x10120000 0x1000>; + interrupt-names = "combined"; + interrupts = <14>; + clocks = <&clcdclk>, <&hclkclcd>; + clock-names = "clcdclk", "apb_pclk"; + status = "disabled"; + }; + vica: intc@10140000 { compatible = "arm,versatile-vic"; interrupt-controller; @@ -748,6 +776,9 @@ clocks = <&uart0clk>, <&pclkuart0>; clock-names = "uartclk", "apb_pclk"; status = "disabled"; + dmas = <&dmac0 14 1>, + <&dmac0 15 1>; + dma-names = "rx", "tx"; }; uart1: uart@101fb000 { @@ -759,6 +790,9 @@ clock-names = "uartclk", "apb_pclk"; pinctrl-names = "default"; pinctrl-0 = <&uart1_default_mux>; + dmas = <&dmac1 22 1>, + <&dmac1 23 1>; + dma-names = "rx", "tx"; }; uart2: uart@101f2000 { @@ -769,6 +803,9 @@ clocks = <&uart2clk>, <&pclkuart2>; clock-names = "uartclk", "apb_pclk"; status = "disabled"; + dmas = <&dmac1 30 1>, + <&dmac1 31 1>; + dma-names = "rx", "tx"; }; rng: rng@101b0000 { @@ -813,5 +850,34 @@ pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>; vmmc-supply = <&vmmc_regulator>; }; + + dmac0: dma-controller@10130000 { + compatible = "arm,pl080", "arm,primecell"; + reg = <0x10130000 0x1000>; + interrupt-parent = <&vica>; + interrupts = <15>; + clocks = <&hclkdma0>; + clock-names = "apb_pclk"; + lli-bus-interface-ahb1; + lli-bus-interface-ahb2; + mem-bus-interface-ahb2; + memcpy-burst-size = <256>; + memcpy-bus-width = <32>; + #dma-cells = <2>; + }; + dmac1: dma-controller@10150000 { + compatible = "arm,pl080", "arm,primecell"; + reg = <0x10150000 0x1000>; + interrupt-parent = <&vica>; + interrupts = <13>; + clocks = <&hclkdma1>; + clock-names = "apb_pclk"; + lli-bus-interface-ahb1; + lli-bus-interface-ahb2; + mem-bus-interface-ahb2; + memcpy-burst-size = <256>; + memcpy-bus-width = <32>; + #dma-cells = <2>; + }; }; };