X-Git-Url: http://git.cascardo.info/?a=blobdiff_plain;f=arch%2Fparisc%2Fmm%2Finit.c;h=aa875fa43488b8a835e2b6d079871832bc0c308f;hb=1212663fba7c5e003e05d24f043d5ed57eb18b24;hp=12117db0043bdd0d52740bc0c42e04d3af9cb496;hpb=54c66f6d781e03dc0b23956234963c4911e6d1c0;p=cascardo%2Flinux.git diff --git a/arch/parisc/mm/init.c b/arch/parisc/mm/init.c index 12117db0043b..aa875fa43488 100644 --- a/arch/parisc/mm/init.c +++ b/arch/parisc/mm/init.c @@ -6,7 +6,7 @@ * changed by Philipp Rumpf * Copyright 1999 Philipp Rumpf (prumpf@tux.org) * Copyright 2004 Randolph Chung (tausq@debian.org) - * Copyright 2006 Helge Deller (deller@gmx.de) + * Copyright 2006-2007 Helge Deller (deller@gmx.de) * */ @@ -24,6 +24,7 @@ #include /* for release_pages and page_cache_release */ #include +#include #include #include #include @@ -65,11 +66,11 @@ static struct resource sysram_resources[MAX_PHYSMEM_RANGES] __read_mostly; physmem_range_t pmem_ranges[MAX_PHYSMEM_RANGES] __read_mostly; int npmem_ranges __read_mostly; -#ifdef __LP64__ +#ifdef CONFIG_64BIT #define MAX_MEM (~0UL) -#else /* !__LP64__ */ +#else /* !CONFIG_64BIT */ #define MAX_MEM (3584U*1024U*1024U) -#endif /* !__LP64__ */ +#endif /* !CONFIG_64BIT */ static unsigned long mem_limit __read_mostly = MAX_MEM; @@ -452,6 +453,8 @@ unsigned long pcxl_dma_start __read_mostly; void __init mem_init(void) { + int codesize, reservedpages, datasize, initsize; + high_memory = __va((max_pfn << PAGE_SHIFT)); #ifndef CONFIG_DISCONTIGMEM @@ -466,7 +469,32 @@ void __init mem_init(void) } #endif - printk(KERN_INFO "Memory: %luk available\n", num_physpages << (PAGE_SHIFT-10)); + codesize = (unsigned long)_etext - (unsigned long)_text; + datasize = (unsigned long)_edata - (unsigned long)_etext; + initsize = (unsigned long)__init_end - (unsigned long)__init_begin; + + reservedpages = 0; +{ + unsigned long pfn; +#ifdef CONFIG_DISCONTIGMEM + int i; + + for (i = 0; i < npmem_ranges; i++) { + for (pfn = node_start_pfn(i); pfn < node_end_pfn(i); pfn++) { + if (PageReserved(pfn_to_page(pfn))) + reservedpages++; + } + } +#else /* !CONFIG_DISCONTIGMEM */ + for (pfn = 0; pfn < max_pfn; pfn++) { + /* + * Only count reserved RAM pages + */ + if (PageReserved(pfn_to_page(pfn))) + reservedpages++; + } +#endif +} #ifdef CONFIG_PA11 if (hppa_dma_ops == &pcxl_dma_ops) { @@ -480,6 +508,38 @@ void __init mem_init(void) vmalloc_start = SET_MAP_OFFSET(MAP_START); #endif + printk(KERN_INFO "Memory: %luk/%luk available (%dk kernel code, %dk reserved, %dk data, %dk init)\n", + (unsigned long)nr_free_pages() << (PAGE_SHIFT-10), + num_physpages << (PAGE_SHIFT-10), + codesize >> 10, + reservedpages << (PAGE_SHIFT-10), + datasize >> 10, + initsize >> 10 + ); + +#ifdef CONFIG_DEBUG_KERNEL /* double-sanity-check paranoia */ + printk("virtual kernel memory layout:\n" + " vmalloc : 0x%p - 0x%p (%4ld MB)\n" + " memory : 0x%p - 0x%p (%4ld MB)\n" + " .init : 0x%p - 0x%p (%4ld kB)\n" + " .data : 0x%p - 0x%p (%4ld kB)\n" + " .text : 0x%p - 0x%p (%4ld kB)\n", + + (void*)VMALLOC_START, (void*)VMALLOC_END, + (VMALLOC_END - VMALLOC_START) >> 20, + + __va(0), high_memory, + ((unsigned long)high_memory - (unsigned long)__va(0)) >> 20, + + __init_begin, __init_end, + ((unsigned long)__init_end - (unsigned long)__init_begin) >> 10, + + _etext, _edata, + ((unsigned long)_edata - (unsigned long)_etext) >> 10, + + _text, _etext, + ((unsigned long)_etext - (unsigned long)_text) >> 10); +#endif } unsigned long *empty_zero_page __read_mostly; @@ -830,7 +890,7 @@ void __init paging_init(void) #ifdef CONFIG_PA20 /* - * Currently, all PA20 chips have 18 bit protection id's, which is the + * Currently, all PA20 chips have 18 bit protection IDs, which is the * limiting factor (space ids are 32 bits). */ @@ -839,10 +899,10 @@ void __init paging_init(void) #else /* - * Currently we have a one-to-one relationship between space id's and - * protection id's. Older parisc chips (PCXS, PCXT, PCXL, PCXL2) only - * support 15 bit protection id's, so that is the limiting factor. - * PCXT' has 18 bit protection id's, but only 16 bit spaceids, so it's + * Currently we have a one-to-one relationship between space IDs and + * protection IDs. Older parisc chips (PCXS, PCXT, PCXL, PCXL2) only + * support 15 bit protection IDs, so that is the limiting factor. + * PCXT' has 18 bit protection IDs, but only 16 bit spaceids, so it's * probably not worth the effort for a special case here. */