X-Git-Url: http://git.cascardo.info/?a=blobdiff_plain;f=arch%2Fpowerpc%2Fkernel%2Fvector.S;h=616a6d854638f15ef35d3a9e5bf80a846da23156;hb=e2ad477cb26360532da7ee9ffc9631d6c0006a1d;hp=1c2e7a343bf5f195cfe4b53c37171056b0554a38;hpb=0b86c75db6e7f68c22ac5d0dae0f551c4897cdf5;p=cascardo%2Flinux.git

diff --git a/arch/powerpc/kernel/vector.S b/arch/powerpc/kernel/vector.S
index 1c2e7a343bf5..616a6d854638 100644
--- a/arch/powerpc/kernel/vector.S
+++ b/arch/powerpc/kernel/vector.S
@@ -70,10 +70,11 @@ _GLOBAL(load_up_altivec)
 	MTMSRD(r5)			/* enable use of AltiVec now */
 	isync
 
-	/* Hack: if we get an altivec unavailable trap with VRSAVE
-	 * set to all zeros, we assume this is a broken application
-	 * that fails to set it properly, and thus we switch it to
-	 * all 1's
+	/*
+	 * While userspace in general ignores VRSAVE, glibc uses it as a boolean
+	 * to optimise userspace context save/restore. Whenever we take an
+	 * altivec unavailable exception we must set VRSAVE to something non
+	 * zero. Set it to all 1s. See also the programming note in the ISA.
 	 */
 	mfspr	r4,SPRN_VRSAVE
 	cmpwi	0,r4,0