powerpc/dts: update MSI bindings doc for MPIC v4.3
authorMinghuan Lian <Minghuan.Lian@freescale.com>
Fri, 21 Jun 2013 10:59:12 +0000 (18:59 +0800)
committerScott Wood <scottwood@freescale.com>
Wed, 7 Aug 2013 23:38:05 +0000 (18:38 -0500)
commit03daa99ef50873651e363fc12ae0b5facdb3f831
tree4c8222c81d769dfbd1186f47aaf06a8b95e33835
parentdf1024ad87286c5935d4ebb5153bf4cebf45eb8a
powerpc/dts: update MSI bindings doc for MPIC v4.3

Add compatible "fsl,mpic-msi-v4.3" for MPIC v4.3. MPIC v4.3 contains
MSIIR and MSIIR1. MSIIR supports 8 MSI registers and MSIIR1 supports
16 MSI registers, but uses different IBS and SRS shift. When using
MSIR1, the interrupt number is not consecutive. It is hard to use
'msi-available-ranges' to describe the ranges of the available
interrupt, so MPIC v4.3 does not support this property.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
[scottwood@freescale.com: minor grammar fixes]
Signed-off-by: Scott Wood <scottwood@freescale.com>
Documentation/devicetree/bindings/powerpc/fsl/msi-pic.txt