sh: Migrate from PG_mapped to PG_dcache_dirty.
authorPaul Mundt <lethal@linux-sh.org>
Wed, 22 Jul 2009 10:20:49 +0000 (19:20 +0900)
committerPaul Mundt <lethal@linux-sh.org>
Wed, 22 Jul 2009 10:20:49 +0000 (19:20 +0900)
commit2277ab4a1df50e05bc732fe9488d4e902bb8399a
treef41cb47f15e02bbd1f79bf08ef7762d3bba934f6
parentc0b96cf639aa1bfa8983f734d4225091aa813e00
sh: Migrate from PG_mapped to PG_dcache_dirty.

This inverts the delayed dcache flush a bit to be more in line with other
platforms. At the same time this also gives us the ability to do some
more optimizations and cleanup. Now that the update_mmu_cache() callsite
only tests for the bit, the implementation can gradually be split out and
made generic, rather than relying on special implementations for each of
the peculiar CPU types.

SH7705 in 32kB mode and SH-4 still need slightly different handling, but
this is something that can remain isolated in the varying page copy/clear
routines. On top of that, SH-X3 is dcache coherent, so there is no need
to bother with any of these tests in the PTEAEX version of
update_mmu_cache(), so we kill that off too.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
arch/sh/include/asm/page.h
arch/sh/include/asm/pgtable.h
arch/sh/include/cpu-sh3/cpu/cacheflush.h
arch/sh/include/cpu-sh4/cpu/cacheflush.h
arch/sh/mm/cache-sh4.c
arch/sh/mm/cache-sh7705.c
arch/sh/mm/pg-sh4.c
arch/sh/mm/pg-sh7705.c
arch/sh/mm/tlb-pteaex.c
arch/sh/mm/tlb-sh3.c
arch/sh/mm/tlb-sh4.c