clk: sunxi-ng: mux: Add support for mux tables
authorChen-Yu Tsai <wens@csie.org>
Thu, 25 Aug 2016 06:21:56 +0000 (14:21 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Thu, 25 Aug 2016 20:26:44 +0000 (22:26 +0200)
commit2b9c875c56f0bec92b301061fe3c2adb5e098b36
tree8dd42f812d70db69bbcfef42a99cf154e8cdd47d
parent89af85253c32b67898c0f8bb06fe6e790e62846f
clk: sunxi-ng: mux: Add support for mux tables

Some clock muxes have holes, i.e. invalid or unconnected inputs,
between parent mux values.

Add support for specifying a mux table to map clock parents to
mux values.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
drivers/clk/sunxi-ng/ccu_mux.c
drivers/clk/sunxi-ng/ccu_mux.h