MIPS: Alchemy: handle db1200 cpld ints as they come in
authorManuel Lauss <manuel.lauss@googlemail.com>
Sat, 21 Jan 2012 17:13:15 +0000 (18:13 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Mon, 23 Jul 2012 12:53:38 +0000 (13:53 +0100)
commit6c2be5cf1d4e70e98d995f9c403b5fbe7b5f2a80
treebc9779db5aa6443289fe8dcedf28ea1308949504
parent278bf05cf68a6e5e965c85217ddc1318d18fcbf7
MIPS: Alchemy: handle db1200 cpld ints as they come in

Remove the loop in the cascade handler and instead unconditionally
handle just the first set interrupt coming from the CPLD.

This gets rid of a lot of spurious interrupts being triggered for
the SMSC91111 ethernet chip especially under high(er) IDE load:
"eth0: spurious interrupt (mask = 0xb3)"

Verified on DB1200 and DB1300.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3288/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/alchemy/devboards/bcsr.c