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(parent: e4ba4fc) | patch
m68k: Set ColdFire ACR1 cache mode depending on kernel configuration
authorStany MARCEL <stany.marcel@novasys-ingenierie.com>
Tue, 16 Oct 2012 05:26:11 +0000 (15:26 +1000)
committerGreg Ungerer <gerg@uclinux.org>
Sun, 28 Apr 2013 23:17:57 +0000 (09:17 +1000)
commita4eff487da4e4e55a15da2a8e8769151b1881a95
treed7cf81c84869f51554cd1b2e93f66a6a72cb5e04tree | snapshot
parente4ba4fc2b98f659f525d02721643a01015a8e3edcommit | diff
m68k: Set ColdFire ACR1 cache mode depending on kernel configuration

For coldfire with MMU enabled, data cache did not follow the configuration but
was configured in writethrough mode.

Signed-off-by: Stany MARCEL <stany.marcel@novasys-ingenierie.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
arch/m68k/include/asm/m54xxacr.h diff | blob | history
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