git.cascardo.info Git - cascardo/linux.git/commit

author	Peter Ujfalusi <peter.ujfalusi@ti.com>
	Thu, 12 Mar 2015 08:06:30 +0000 (10:06 +0200)
committer	Sekhar Nori <nsekhar@ti.com>
	Wed, 18 Mar 2015 11:47:36 +0000 (17:17 +0530)
commit	b38434145b341c148b8d98cfbfc1e87bb4d9e2d9
tree	e67a0ef7589fb46e0a9f7d8ab915144dd6102eb0	tree \| snapshot
parent	256b20a54a13962a9fcffabbc08903301fa4c259	commit \| diff

ARM: davinci: irqs: Correct McASP1 TX interrupt definition for DM646x

McASP1 TX interrupt is 30, not 32 on DM646x DMSoC.

While at it remove the bogus AEMIF interrupt entry from
dm646x_default_priorities[]. AEMIF interrupt on DM6467 is
60 not 30 and the entry for the correct interrupt number
is already present in the same table.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
[nsekhar@ti.com: remove bogus entry from dm646x_default_priorities[]]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>

arch/arm/mach-davinci/dm646x.c		diff \| blob \| history
arch/arm/mach-davinci/include/mach/irqs.h		diff \| blob \| history