arm: exynos5: ARM ASV Lock Bit implementation
authorArjun KV <arjun.kv@samsung.com>
Wed, 19 Dec 2012 05:29:00 +0000 (10:59 +0530)
committerChromeBot <chrome-bot@google.com>
Fri, 1 Mar 2013 21:51:56 +0000 (13:51 -0800)
commitcc47f397d5d0eca06d05922d940512f0c48eb515
treede62fb43a3b8bfb6d2a848d041ab83d21252ef3f
parent3ca8eadb51cf3595f46c1ac6fb78c0294ae52cf0
arm: exynos5: ARM ASV Lock Bit implementation

If lock bit is configured, voltage for cpu frequency in some
ranges(800-200MHz, 1000-200MHz, 1100-200MHz) should be locked with the
voltage of the locked cpu frequency.  e.g. in 800-200MHz range all
frequencies below 800MHz will be configured with same voltage as
800MHz.

BUG=chrome-os-partner:16615

TEST=Compile and boot kernel.  Add printouts to
exynos5250_cpufreq_get_asv() to confirm that the min_t() doesn't
actually change the index on existing systems where lock bits are all
0.  Check that `dmesg` contains "EXYNOS5250: ASV lock int: 0 g3d: 0
arm: 0" which means that lock bits are all disabled.

[dianders cleaned up patch and CL description]

Change-Id: If5fcfae38af1bd01a5646ae94f7b010e564411cd
Signed-off-by: Arjun.K.V <arjun.kv@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/39465
arch/arm/mach-exynos/asv-5250.c