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dt-bindings: interrupt-controllers: add description of SIC1 and SIC2
authorVladimir Zapolskiy <vz@mleia.com>
Mon, 25 Apr 2016 01:00:23 +0000 (04:00 +0300)
committerVladimir Zapolskiy <vz@mleia.com>
Wed, 27 Apr 2016 21:36:24 +0000 (00:36 +0300)
commitd839e821efc06031c927cabbbc1e976bc71f5d4f
tree47547e13d0ebe3f89d728047db65fb197a5d19e9tree | snapshot
parent961212e3fd1ee29d31f3c362f0bc854868679f63commit | diff
dt-bindings: interrupt-controllers: add description of SIC1 and SIC2

NXP LPC32xx has three interrupt controllers, namely root Main
Interrupt Controller (MIC) and two supplementary Sub Interrupt
Controllers (SIC1 and SIC2), four interrupt outputs from SIC1 and SIC2
are connected to MIC.

Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Documentation/devicetree/bindings/interrupt-controller/nxp,lpc3220-mic.txt diff | blob | history
Unnamed repository; edit this file 'description' to name the repository.