OMAPDSS: HDMI: store WP pointer to hdmi_pll_data
authorTomi Valkeinen <tomi.valkeinen@ti.com>
Thu, 16 Oct 2014 12:31:38 +0000 (15:31 +0300)
committerTomi Valkeinen <tomi.valkeinen@ti.com>
Wed, 12 Nov 2014 11:40:26 +0000 (13:40 +0200)
HDMI PLL code needs the pointer to the WP block so that it can manage
its power. Currently this is passed as a function parameter to
hdmi_pll_enable and hdmi_pll_disable. To make the PLL function adhere to
the DSS PLL API, we need to remove the WP parameter.

This patch stores the WP pointer to hdmi_pll_data in hdmi_pll_init, so
that it's available when needed.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
drivers/video/fbdev/omap2/dss/hdmi.h
drivers/video/fbdev/omap2/dss/hdmi4.c
drivers/video/fbdev/omap2/dss/hdmi5.c
drivers/video/fbdev/omap2/dss/hdmi_pll.c

index 4b9bf08..03761ec 100644 (file)
@@ -248,6 +248,8 @@ struct hdmi_wp_data {
 struct hdmi_pll_data {
        void __iomem *base;
 
+       struct hdmi_wp_data *wp;
+
        struct hdmi_pll_info info;
 };
 
@@ -312,12 +314,13 @@ void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt,
 int hdmi_wp_init(struct platform_device *pdev, struct hdmi_wp_data *wp);
 
 /* HDMI PLL funcs */
-int hdmi_pll_enable(struct hdmi_pll_data *pll, struct hdmi_wp_data *wp);
-void hdmi_pll_disable(struct hdmi_pll_data *pll, struct hdmi_wp_data *wp);
+int hdmi_pll_enable(struct hdmi_pll_data *pll);
+void hdmi_pll_disable(struct hdmi_pll_data *pll);
 void hdmi_pll_dump(struct hdmi_pll_data *pll, struct seq_file *s);
 void hdmi_pll_compute(struct hdmi_pll_data *pll, unsigned long clkin,
        unsigned long target_tmds);
-int hdmi_pll_init(struct platform_device *pdev, struct hdmi_pll_data *pll);
+int hdmi_pll_init(struct platform_device *pdev, struct hdmi_pll_data *pll,
+       struct hdmi_wp_data *wp);
 
 /* HDMI PHY funcs */
 int hdmi_phy_configure(struct hdmi_phy_data *phy, unsigned long hfbitclk,
index 1f2fbcc..2094b6e 100644 (file)
@@ -197,7 +197,7 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev)
        hdmi_pll_compute(&hdmi.pll, clk_get_rate(hdmi.sys_clk), p->pixelclock);
 
        /* config the PLL and PHY hdmi_set_pll_pwrfirst */
-       r = hdmi_pll_enable(&hdmi.pll, &hdmi.wp);
+       r = hdmi_pll_enable(&hdmi.pll);
        if (r) {
                DSSDBG("Failed to lock PLL\n");
                goto err_pll_enable;
@@ -241,7 +241,7 @@ err_vid_enable:
 err_phy_cfg:
        hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
 err_phy_pwr:
-       hdmi_pll_disable(&hdmi.pll, &hdmi.wp);
+       hdmi_pll_disable(&hdmi.pll);
 err_pll_enable:
        hdmi_power_off_core(dssdev);
        return -EIO;
@@ -259,7 +259,7 @@ static void hdmi_power_off_full(struct omap_dss_device *dssdev)
 
        hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
 
-       hdmi_pll_disable(&hdmi.pll, &hdmi.wp);
+       hdmi_pll_disable(&hdmi.pll);
 
        hdmi_power_off_core(dssdev);
 }
@@ -688,7 +688,7 @@ static int omapdss_hdmihw_probe(struct platform_device *pdev)
        if (r)
                return r;
 
-       r = hdmi_pll_init(pdev, &hdmi.pll);
+       r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
        if (r)
                return r;
 
index e8ca910..fb8c145 100644 (file)
@@ -215,7 +215,7 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev)
                        hdmi_wp_get_irqstatus(&hdmi.wp));
 
        /* config the PLL and PHY hdmi_set_pll_pwrfirst */
-       r = hdmi_pll_enable(&hdmi.pll, &hdmi.wp);
+       r = hdmi_pll_enable(&hdmi.pll);
        if (r) {
                DSSDBG("Failed to lock PLL\n");
                goto err_pll_enable;
@@ -259,7 +259,7 @@ err_vid_enable:
        hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
 err_phy_pwr:
 err_phy_cfg:
-       hdmi_pll_disable(&hdmi.pll, &hdmi.wp);
+       hdmi_pll_disable(&hdmi.pll);
 err_pll_enable:
        hdmi_power_off_core(dssdev);
        return -EIO;
@@ -277,7 +277,7 @@ static void hdmi_power_off_full(struct omap_dss_device *dssdev)
 
        hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
 
-       hdmi_pll_disable(&hdmi.pll, &hdmi.wp);
+       hdmi_pll_disable(&hdmi.pll);
 
        hdmi_power_off_core(dssdev);
 }
@@ -717,7 +717,7 @@ static int omapdss_hdmihw_probe(struct platform_device *pdev)
        if (r)
                return r;
 
-       r = hdmi_pll_init(pdev, &hdmi.pll);
+       r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
        if (r)
                return r;
 
index 0942bdc..190bede 100644 (file)
@@ -166,8 +166,9 @@ static int hdmi_pll_config(struct hdmi_pll_data *pll)
        return 0;
 }
 
-int hdmi_pll_enable(struct hdmi_pll_data *pll, struct hdmi_wp_data *wp)
+int hdmi_pll_enable(struct hdmi_pll_data *pll)
 {
+       struct hdmi_wp_data *wp = pll->wp;
        u16 r = 0;
 
        r = hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF);
@@ -185,8 +186,10 @@ int hdmi_pll_enable(struct hdmi_pll_data *pll, struct hdmi_wp_data *wp)
        return 0;
 }
 
-void hdmi_pll_disable(struct hdmi_pll_data *pll, struct hdmi_wp_data *wp)
+void hdmi_pll_disable(struct hdmi_pll_data *pll)
 {
+       struct hdmi_wp_data *wp = pll->wp;
+
        hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF);
 }
 
@@ -245,11 +248,14 @@ static int hdmi_pll_init_features(struct platform_device *pdev)
        return 0;
 }
 
-int hdmi_pll_init(struct platform_device *pdev, struct hdmi_pll_data *pll)
+int hdmi_pll_init(struct platform_device *pdev, struct hdmi_pll_data *pll,
+       struct hdmi_wp_data *wp)
 {
        int r;
        struct resource *res;
 
+       pll->wp = wp;
+
        r = hdmi_pll_init_features(pdev);
        if (r)
                return r;