ARM: dts: sun7i: Add pin muxing options for the GMAC

The A20 has EMAC and GMAC muxed on the same pins.
Add pin sets with gmac function for MII and RGMII mode to the DTSI.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 8eb4d54..68c889c 100644 (file)
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -484,6 +484,32 @@
                                allwinner,drive = <0>;
                                allwinner,pull = <0>;
                        };
+
+                       gmac_pins_mii_a: gmac_mii@0 {
+                               allwinner,pins = "PA0", "PA1", "PA2",
+                                               "PA3", "PA4", "PA5", "PA6",
+                                               "PA7", "PA8", "PA9", "PA10",
+                                               "PA11", "PA12", "PA13", "PA14",
+                                               "PA15", "PA16";
+                               allwinner,function = "gmac";
+                               allwinner,drive = <0>;
+                               allwinner,pull = <0>;
+                       };
+
+                       gmac_pins_rgmii_a: gmac_rgmii@0 {
+                               allwinner,pins = "PA0", "PA1", "PA2",
+                                               "PA3", "PA4", "PA5", "PA6",
+                                               "PA7", "PA8", "PA10",
+                                               "PA11", "PA12", "PA13",
+                                               "PA15", "PA16";
+                               allwinner,function = "gmac";
+                               /*
+                                * data lines in RGMII mode use DDR mode
+                                * and need a higher signal drive strength
+                                */
+                               allwinner,drive = <3>;
+                               allwinner,pull = <0>;
+                       };
                };
 
                timer@01c20c00 {