be2net: fix access to SEMAPHORE reg
authorSathya Perla <sathya.perla@emulex.com>
Tue, 6 Nov 2012 17:48:59 +0000 (17:48 +0000)
committerDavid S. Miller <davem@davemloft.net>
Wed, 7 Nov 2012 21:59:52 +0000 (16:59 -0500)
The SEMAPHORE register was being accessed from the csr BAR space. This BAR
may not be available in some Skyhawk-R configurations. Instead, access this
register via the PCI config space (it's available there too).

Signed-off-by: Sathya Perla <sathya.perla@emulex.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/emulex/benet/be.h
drivers/net/ethernet/emulex/benet/be_cmds.c
drivers/net/ethernet/emulex/benet/be_hw.h
drivers/net/ethernet/emulex/benet/be_main.c

index 26b9b8b..e391d5a 100644 (file)
@@ -348,7 +348,6 @@ struct be_adapter {
        struct pci_dev *pdev;
        struct net_device *netdev;
 
-       u8 __iomem *csr;
        u8 __iomem *db;         /* Door Bell */
 
        struct mutex mbox_lock; /* For serializing mbox cmds to BE card */
index 1768cfa..f2875aa 100644 (file)
@@ -468,14 +468,13 @@ static int be_mbox_notify_wait(struct be_adapter *adapter)
 static int be_POST_stage_get(struct be_adapter *adapter, u16 *stage)
 {
        u32 sem;
+       u32 reg = skyhawk_chip(adapter) ? SLIPORT_SEMAPHORE_OFFSET_SH :
+                                         SLIPORT_SEMAPHORE_OFFSET_BE;
 
-       if (lancer_chip(adapter))
-               sem  = ioread32(adapter->db + MPU_EP_SEMAPHORE_IF_TYPE2_OFFSET);
-       else
-               sem  = ioread32(adapter->csr + MPU_EP_SEMAPHORE_OFFSET);
+       pci_read_config_dword(adapter->pdev, reg, &sem);
+       *stage = sem & POST_STAGE_MASK;
 
-       *stage = sem & EP_SEMAPHORE_POST_STAGE_MASK;
-       if ((sem >> EP_SEMAPHORE_POST_ERR_SHIFT) & EP_SEMAPHORE_POST_ERR_MASK)
+       if ((sem >> POST_ERR_SHIFT) & POST_ERR_MASK)
                return -1;
        else
                return 0;
index c257207..541d453 100644 (file)
 
 #define MPU_EP_CONTROL                 0
 
-/********** MPU semphore ******************/
-#define MPU_EP_SEMAPHORE_OFFSET                0xac
-#define MPU_EP_SEMAPHORE_IF_TYPE2_OFFSET       0x400
-#define EP_SEMAPHORE_POST_STAGE_MASK           0x0000FFFF
-#define EP_SEMAPHORE_POST_ERR_MASK             0x1
-#define EP_SEMAPHORE_POST_ERR_SHIFT            31
+/********** MPU semphore: used for SH & BE  *************/
+#define SLIPORT_SEMAPHORE_OFFSET_BE            0x7c
+#define SLIPORT_SEMAPHORE_OFFSET_SH            0x94
+#define POST_STAGE_MASK                                0x0000FFFF
+#define POST_ERR_MASK                          0x1
+#define POST_ERR_SHIFT                         31
 
 /* MPU semphore POST stage values */
 #define POST_STAGE_AWAITING_HOST_RDY   0x1 /* FW awaiting goahead from host */
index 95e279f..5c475cc 100644 (file)
@@ -3619,8 +3619,6 @@ static void be_netdev_init(struct net_device *netdev)
 
 static void be_unmap_pci_bars(struct be_adapter *adapter)
 {
-       if (adapter->csr)
-               pci_iounmap(adapter->pdev, adapter->csr);
        if (adapter->db)
                pci_iounmap(adapter->pdev, adapter->db);
        if (adapter->roce_db.base)
@@ -3668,13 +3666,6 @@ static int be_map_pci_bars(struct be_adapter *adapter)
        adapter->if_type = (sli_intf & SLI_INTF_IF_TYPE_MASK) >>
                                SLI_INTF_IF_TYPE_SHIFT;
 
-       if (be_physfn(adapter) && !lancer_chip(adapter)) {
-               addr = pci_iomap(adapter->pdev, 2, 0);
-               if (addr == NULL)
-                       return -ENOMEM;
-               adapter->csr = addr;
-       }
-
        addr = pci_iomap(adapter->pdev, db_bar(adapter), 0);
        if (addr == NULL)
                goto pci_map_err;