ARM: mvebu: fix unit address of MPIC nodes
authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tue, 3 Mar 2015 14:41:03 +0000 (15:41 +0100)
committerGregory CLEMENT <gregory.clement@free-electrons.com>
Wed, 4 Mar 2015 14:09:27 +0000 (15:09 +0100)
The Device Tree nodes describing the MPIC nodes on Armada 370, 375,
38x and XP had a unit address that did not match the first reg
property, as suggested by the ePAPR. This commit fixes that.

[gregory.clement@free-electrons.com: removed the armada-38x part, as it
was already applied by a previous patch]

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
arch/arm/boot/dts/armada-370-xp.dtsi
arch/arm/boot/dts/armada-370.dtsi
arch/arm/boot/dts/armada-375.dtsi
arch/arm/boot/dts/armada-xp.dtsi

index 1058cf6..7b3393e 100644 (file)
                                      <0x20250 0x8>;
                        };
 
-                       mpic: interrupt-controller@20000 {
+                       mpic: interrupt-controller@20a00 {
                                compatible = "marvell,mpic";
                                #interrupt-cells = <1>;
                                #size-cells = <1>;
index 27397f1..50f259b 100644 (file)
                                reg = <0x18330 0x4>;
                        };
 
-                       interrupt-controller@20000 {
+                       interrupt-controller@20a00 {
                                reg = <0x20a00 0x1d0>, <0x21870 0x58>;
                        };
 
index 6420693..c6fedf2 100644 (file)
                                reg = <0x20000 0x100>, <0x20180 0x20>;
                        };
 
-                       mpic: interrupt-controller@20000 {
+                       mpic: interrupt-controller@20a00 {
                                compatible = "marvell,mpic";
                                reg = <0x20a00 0x2d0>, <0x21070 0x58>;
                                #interrupt-cells = <1>;
index bbabee5..ff47345 100644 (file)
                                clocks = <&coreclk 1>;
                        };
 
-                       interrupt-controller@20000 {
+                       interrupt-controller@20a00 {
                              reg = <0x20a00 0x2d0>, <0x21070 0x58>;
                        };