clk: tegra: Constify pdiv-to-hw mappings

This is static data that is never modified, so make it const.

Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
index c723408..e14d3ae 100644 (file)
--- a/drivers/clk/tegra/clk-pll.c
+++ b/drivers/clk/tegra/clk-pll.c
@@ -359,7 +359,7 @@ static void clk_pll_disable(struct clk_hw *hw)
 static int _p_div_to_hw(struct clk_hw *hw, u8 p_div)
 {
        struct tegra_clk_pll *pll = to_clk_pll(hw);
-       struct pdiv_map *p_tohw = pll->params->pdiv_tohw;
+       const struct pdiv_map *p_tohw = pll->params->pdiv_tohw;
 
        if (p_tohw) {
                while (p_tohw->pdiv) {
@@ -375,7 +375,7 @@ static int _p_div_to_hw(struct clk_hw *hw, u8 p_div)
 static int _hw_to_p_div(struct clk_hw *hw, u8 p_div_hw)
 {
        struct tegra_clk_pll *pll = to_clk_pll(hw);
-       struct pdiv_map *p_tohw = pll->params->pdiv_tohw;
+       const struct pdiv_map *p_tohw = pll->params->pdiv_tohw;
 
        if (p_tohw) {
                while (p_tohw->pdiv) {
@@ -1700,7 +1700,7 @@ struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name,
                          spinlock_t *lock)
 {
        struct clk *parent, *clk;
-       struct pdiv_map *p_tohw = pll_params->pdiv_tohw;
+       const struct pdiv_map *p_tohw = pll_params->pdiv_tohw;
        struct tegra_clk_pll *pll;
        struct tegra_clk_pll_freq_table cfg;
        unsigned long parent_rate;

diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c
index 1931f84..a373d9f 100644 (file)
--- a/drivers/clk/tegra/clk-tegra114.c
+++ b/drivers/clk/tegra/clk-tegra114.c
@@ -182,7 +182,7 @@ static struct div_nmp pllxc_nmp = {
        .divp_width = 4,
 };
 
-static struct pdiv_map pllxc_p[] = {
+static const struct pdiv_map pllxc_p[] = {
        { .pdiv =  1, .hw_val =  0 },
        { .pdiv =  2, .hw_val =  1 },
        { .pdiv =  3, .hw_val =  2 },
@@ -244,7 +244,7 @@ static struct div_nmp pllcx_nmp = {
        .divp_width = 3,
 };
 
-static struct pdiv_map pllc_p[] = {
+static const struct pdiv_map pllc_p[] = {
        { .pdiv =  1, .hw_val = 0 },
        { .pdiv =  2, .hw_val = 1 },
        { .pdiv =  4, .hw_val = 3 },
@@ -318,7 +318,7 @@ static struct div_nmp pllm_nmp = {
        .override_divp_shift = 27,
 };
 
-static struct pdiv_map pllm_p[] = {
+static const struct pdiv_map pllm_p[] = {
        { .pdiv = 1, .hw_val = 0 },
        { .pdiv = 2, .hw_val = 1 },
        { .pdiv = 0, .hw_val = 0 },
@@ -472,7 +472,7 @@ static struct tegra_clk_pll_params pll_d2_params = {
                 TEGRA_PLL_USE_LOCK,
 };
 
-static struct pdiv_map pllu_p[] = {
+static const struct pdiv_map pllu_p[] = {
        { .pdiv = 1, .hw_val = 1 },
        { .pdiv = 2, .hw_val = 0 },
        { .pdiv = 0, .hw_val = 0 },

diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c
index d98bf68..156a753 100644 (file)
--- a/drivers/clk/tegra/clk-tegra124.c
+++ b/drivers/clk/tegra/clk-tegra124.c
@@ -168,7 +168,7 @@ static struct div_nmp pllxc_nmp = {
        .divp_width = 4,
 };
 
-static struct pdiv_map pllxc_p[] = {
+static const struct pdiv_map pllxc_p[] = {
        { .pdiv =  1, .hw_val =  0 },
        { .pdiv =  2, .hw_val =  1 },
        { .pdiv =  3, .hw_val =  2 },
@@ -264,7 +264,7 @@ static struct div_nmp pllcx_nmp = {
        .divp_width = 3,
 };
 
-static struct pdiv_map pllc_p[] = {
+static const struct pdiv_map pllc_p[] = {
        { .pdiv =  1, .hw_val = 0 },
        { .pdiv =  2, .hw_val = 1 },
        { .pdiv =  3, .hw_val = 2 },
@@ -338,7 +338,7 @@ static struct div_nmp pllss_nmp = {
        .divp_width = 4,
 };
 
-static struct pdiv_map pll12g_ssd_esd_p[] = {
+static const struct pdiv_map pll12g_ssd_esd_p[] = {
        { .pdiv =  1, .hw_val =  0 },
        { .pdiv =  2, .hw_val =  1 },
        { .pdiv =  3, .hw_val =  2 },
@@ -388,7 +388,7 @@ static struct tegra_clk_pll_params pll_c4_params = {
        .freq_table = pll_c4_freq_table,
 };
 
-static struct pdiv_map pllm_p[] = {
+static const struct pdiv_map pllm_p[] = {
        { .pdiv = 1, .hw_val = 0 },
        { .pdiv = 2, .hw_val = 1 },
        { .pdiv = 0, .hw_val = 0 },
@@ -682,7 +682,7 @@ static struct tegra_clk_pll_params pll_dp_params = {
        .freq_table = pll_dp_freq_table,
 };
 
-static struct pdiv_map pllu_p[] = {
+static const struct pdiv_map pllu_p[] = {
        { .pdiv = 1, .hw_val = 1 },
        { .pdiv = 2, .hw_val = 0 },
        { .pdiv = 0, .hw_val = 0 },

diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c
index 7ac9aba..d7da6fd 100644 (file)
--- a/drivers/clk/tegra/clk-tegra20.c
+++ b/drivers/clk/tegra/clk-tegra20.c
@@ -359,7 +359,7 @@ static struct tegra_clk_pll_params pll_d_params = {
        .flags = TEGRA_PLL_HAS_CPCON,
 };
 
-static struct pdiv_map pllu_p[] = {
+static const struct pdiv_map pllu_p[] = {
        { .pdiv = 1, .hw_val = 1 },
        { .pdiv = 2, .hw_val = 0 },
        { .pdiv = 0, .hw_val = 0 },

diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c
index a6f90b9..019a7fc 100644 (file)
--- a/drivers/clk/tegra/clk-tegra30.c
+++ b/drivers/clk/tegra/clk-tegra30.c
@@ -332,7 +332,7 @@ static struct tegra_clk_pll_freq_table pll_d_freq_table[] = {
        {        0,          0,    0,  0, 0,  0 },
 };
 
-static struct pdiv_map pllu_p[] = {
+static const struct pdiv_map pllu_p[] = {
        { .pdiv = 1, .hw_val = 1 },
        { .pdiv = 2, .hw_val = 0 },
        { .pdiv = 0, .hw_val = 0 },

diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h
index 5d26789..bdaec2b 100644 (file)
--- a/drivers/clk/tegra/clk.h
+++ b/drivers/clk/tegra/clk.h
@@ -233,7 +233,7 @@ struct tegra_clk_pll_params {
        int             stepb_shift;
        int             lock_delay;
        int             max_p;
-       struct pdiv_map *pdiv_tohw;
+       const struct pdiv_map *pdiv_tohw;
        struct div_nmp  *div_nmp;
        struct tegra_clk_pll_freq_table *freq_table;
        unsigned long   fixed_rate;