drivers/amdgpu: Remove redundant itermediate return val

Found-by: Coccinelle
Signed-off-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
index c0c9cc3..120a9e2 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
@@ -1662,7 +1662,6 @@ static int fiji_populate_cac_table(struct pp_hwmgr *hwmgr,
 {
        uint32_t count;
        uint8_t index;
-       int result = 0;
        struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend);
        struct phm_ppt_v1_information *table_info =
                        (struct phm_ppt_v1_information *)(hwmgr->pptable);
@@ -1684,7 +1683,7 @@ static int fiji_populate_cac_table(struct pp_hwmgr *hwmgr,
                                                VOLTAGE_SCALE)) / 25);
        }
 
-       return result;
+       return 0;
 }
 
 /**
@@ -4573,7 +4572,6 @@ static int fiji_trim_single_dpm_states(struct pp_hwmgr *hwmgr,
 static int fiji_trim_dpm_states(struct pp_hwmgr *hwmgr,
                const struct fiji_power_state *fiji_ps)
 {
-       int result = 0;
        struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend);
        uint32_t high_limit_count;
 
@@ -4593,7 +4591,7 @@ static int fiji_trim_dpm_states(struct pp_hwmgr *hwmgr,
                        fiji_ps->performance_levels[0].memory_clock,
                        fiji_ps->performance_levels[high_limit_count].memory_clock);
 
-       return result;
+       return 0;
 }
 
 static int fiji_generate_dpm_level_enable_mask(

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
index 417e525..82d01d7 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
@@ -4322,7 +4322,6 @@ static int polaris10_trim_single_dpm_states(struct pp_hwmgr *hwmgr,
 static int polaris10_trim_dpm_states(struct pp_hwmgr *hwmgr,
                const struct polaris10_power_state *polaris10_ps)
 {
-       int result = 0;
        struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend);
        uint32_t high_limit_count;
 
@@ -4342,7 +4341,7 @@ static int polaris10_trim_dpm_states(struct pp_hwmgr *hwmgr,
                        polaris10_ps->performance_levels[0].memory_clock,
                        polaris10_ps->performance_levels[high_limit_count].memory_clock);
 
-       return result;
+       return 0;
 }
 
 static int polaris10_generate_dpm_level_enable_mask(

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
index 306483d..c7dc111 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
@@ -1334,7 +1334,6 @@ static int tonga_populate_cac_tables(struct pp_hwmgr *hwmgr,
 {
        uint32_t count;
        uint8_t index;
-       int result = 0;
        tonga_hwmgr *data = (tonga_hwmgr *)(hwmgr->backend);
        struct phm_ppt_v1_information *pptable_info = (struct phm_ppt_v1_information *)(hwmgr->pptable);
        struct phm_ppt_v1_voltage_lookup_table *vddgfx_lookup_table = pptable_info->vddgfx_lookup_table;
@@ -1381,7 +1380,7 @@ static int tonga_populate_cac_tables(struct pp_hwmgr *hwmgr,
                }
        }
 
-       return result;
+       return 0;
 }
 
 
@@ -5460,7 +5459,6 @@ static    int tonga_trim_single_dpm_states(struct pp_hwmgr *hwmgr,
 
 static int tonga_trim_dpm_states(struct pp_hwmgr *hwmgr, const struct tonga_power_state *hw_state)
 {
-       int result = 0;
        struct tonga_hwmgr *data = (struct tonga_hwmgr *)(hwmgr->backend);
        uint32_t high_limit_count;
 
@@ -5480,7 +5478,7 @@ static int tonga_trim_dpm_states(struct pp_hwmgr *hwmgr, const struct tonga_powe
                                                hw_state->performance_levels[0].memory_clock,
                                                hw_state->performance_levels[high_limit_count].memory_clock);
 
-       return result;
+       return 0;
 }
 
 static int tonga_generate_dpm_level_enable_mask(struct pp_hwmgr *hwmgr, const void *input)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_processpptables.c b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_processpptables.c
index 53f02c7..cfb647f 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_processpptables.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/tonga_processpptables.c
@@ -1068,7 +1068,6 @@ int tonga_pp_tables_initialize(struct pp_hwmgr *hwmgr)
 
 int tonga_pp_tables_uninitialize(struct pp_hwmgr *hwmgr)
 {
-       int result = 0;
        struct phm_ppt_v1_information *pp_table_information =
                (struct phm_ppt_v1_information *)(hwmgr->pptable);
 
@@ -1108,7 +1107,7 @@ int tonga_pp_tables_uninitialize(struct pp_hwmgr *hwmgr)
        kfree(hwmgr->pptable);
        hwmgr->pptable = NULL;
 
-       return result;
+       return 0;
 }
 
 const struct pp_table_func tonga_pptable_funcs = {

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
index b22722e..f42c536 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
@@ -479,7 +479,6 @@ static int tonga_request_smu_reload_fw(struct pp_smumgr *smumgr)
        struct tonga_smumgr *tonga_smu =
                (struct tonga_smumgr *)(smumgr->backend);
        uint16_t fw_to_load;
-       int result = 0;
        struct SMU_DRAMData_TOC *toc;
        /**
         * First time this gets called during SmuMgr init,
@@ -563,7 +562,7 @@ static int tonga_request_smu_reload_fw(struct pp_smumgr *smumgr)
                smumgr, PPSMC_MSG_LoadUcodes, fw_to_load),
                "Fail to Request SMU Load uCode", return 0);
 
-       return result;
+       return 0;
 }
 
 static int tonga_request_smu_load_specific_fw(struct pp_smumgr *smumgr,