clk: gcc-msm8996: add missing pcie phy reset lines
authorSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Thu, 25 Aug 2016 11:20:47 +0000 (12:20 +0100)
committerStephen Boyd <sboyd@codeaurora.org>
Thu, 25 Aug 2016 20:02:33 +0000 (13:02 -0700)
This patch adds missing 2 PCIE common reset lines.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/qcom/gcc-msm8996.c
include/dt-bindings/clock/qcom,gcc-msm8996.h

index 2c36771..ebe5d18 100644 (file)
@@ -3404,6 +3404,8 @@ static const struct qcom_reset_map gcc_msm8996_resets[] = {
        [GCC_PCIE_2_BCR] = { 0x6e000 },
        [GCC_PCIE_2_PHY_BCR] = { 0x6e038 },
        [GCC_PCIE_PHY_BCR] = { 0x6f000 },
+       [GCC_PCIE_PHY_COM_BCR] = { 0x6f014 },
+       [GCC_PCIE_PHY_COM_NOCSR_BCR] = { 0x6f00c },
        [GCC_DCD_BCR] = { 0x70000 },
        [GCC_OBT_ODT_BCR] = { 0x73000 },
        [GCC_UFS_BCR] = { 0x75000 },
index 6f814db..b7ea1e8 100644 (file)
 #define GCC_MSMPU_BCR                                          98
 #define GCC_MSS_Q6_BCR                                         99
 #define GCC_QREFS_VBG_CAL_BCR                                  100
+#define GCC_PCIE_PHY_COM_BCR                                   101
+#define GCC_PCIE_PHY_COM_NOCSR_BCR                             102
+
 
 /* Indexes for GDSCs */
 #define AGGRE0_NOC_GDSC                        0