ASoC: arizona: Add 32uS delay after putting FLL into freerun
authorCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Mon, 30 Nov 2015 17:37:28 +0000 (17:37 +0000)
committerMark Brown <broonie@kernel.org>
Tue, 1 Dec 2015 15:18:44 +0000 (15:18 +0000)
When switching between two clock sources using the FLL freerun to smooth
the transition we should wait 32uS after putting the FLL into freerun
before we proceed. In practice we appear to be getting enough delay from
the surrounding code, but better to make it explicit.

Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/codecs/arizona.c

index e76ecc7..a23f7d1 100644 (file)
@@ -2212,9 +2212,9 @@ static int arizona_enable_fll(struct arizona_fll *fll)
                /* Facilitate smooth refclk across the transition */
                regmap_update_bits_async(fll->arizona->regmap, fll->base + 0x9,
                                         ARIZONA_FLL1_GAIN_MASK, 0);
-               regmap_update_bits_async(fll->arizona->regmap, fll->base + 1,
-                                        ARIZONA_FLL1_FREERUN,
-                                        ARIZONA_FLL1_FREERUN);
+               regmap_update_bits(fll->arizona->regmap, fll->base + 1,
+                                  ARIZONA_FLL1_FREERUN, ARIZONA_FLL1_FREERUN);
+               udelay(32);
        }
 
        /*