x86, cpufeature: Rename X86_FEATURE_CLFLSH to X86_FEATURE_CLFLUSH
authorH. Peter Anvin <hpa@linux.intel.com>
Thu, 27 Feb 2014 16:31:30 +0000 (08:31 -0800)
committerH. Peter Anvin <hpa@linux.intel.com>
Thu, 27 Feb 2014 16:31:30 +0000 (08:31 -0800)
We call this "clflush" in /proc/cpuinfo, and have
cpu_has_clflush()... let's be consistent and just call it that.

Cc: Gleb Natapov <gleb@kernel.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Alan Cox <alan@linux.intel.com>
Link: http://lkml.kernel.org/n/tip-mlytfzjkvuf739okyn40p8a5@git.kernel.org
arch/x86/include/asm/cpufeature.h
arch/x86/kernel/cpu/common.c
arch/x86/kernel/smpboot.c
arch/x86/kvm/cpuid.c
drivers/gpu/drm/gma500/mmu.c

index bc507d7..63211ef 100644 (file)
@@ -37,7 +37,7 @@
 #define X86_FEATURE_PAT                (0*32+16) /* Page Attribute Table */
 #define X86_FEATURE_PSE36      (0*32+17) /* 36-bit PSEs */
 #define X86_FEATURE_PN         (0*32+18) /* Processor serial number */
-#define X86_FEATURE_CLFLSH     (0*32+19) /* "clflush" CLFLUSH instruction */
+#define X86_FEATURE_CLFLUSH    (0*32+19) /* CLFLUSH instruction */
 #define X86_FEATURE_DS         (0*32+21) /* "dts" Debug Store */
 #define X86_FEATURE_ACPI       (0*32+22) /* ACPI via MSR */
 #define X86_FEATURE_MMX                (0*32+23) /* Multimedia Extensions */
@@ -318,7 +318,7 @@ extern const char * const x86_power_flags[32];
 #define cpu_has_pmm_enabled    boot_cpu_has(X86_FEATURE_PMM_EN)
 #define cpu_has_ds             boot_cpu_has(X86_FEATURE_DS)
 #define cpu_has_pebs           boot_cpu_has(X86_FEATURE_PEBS)
-#define cpu_has_clflush                boot_cpu_has(X86_FEATURE_CLFLSH)
+#define cpu_has_clflush                boot_cpu_has(X86_FEATURE_CLFLUSH)
 #define cpu_has_bts            boot_cpu_has(X86_FEATURE_BTS)
 #define cpu_has_gbpages                boot_cpu_has(X86_FEATURE_GBPAGES)
 #define cpu_has_arch_perfmon   boot_cpu_has(X86_FEATURE_ARCH_PERFMON)
index 8e28bf2..2c6ac6f 100644 (file)
@@ -1025,7 +1025,7 @@ __setup("show_msr=", setup_show_msr);
 
 static __init int setup_noclflush(char *arg)
 {
-       setup_clear_cpu_cap(X86_FEATURE_CLFLSH);
+       setup_clear_cpu_cap(X86_FEATURE_CLFLUSH);
        return 1;
 }
 __setup("noclflush", setup_noclflush);
index a32da80..ffc78c3 100644 (file)
@@ -1379,7 +1379,7 @@ static inline void mwait_play_dead(void)
 
        if (!this_cpu_has(X86_FEATURE_MWAIT))
                return;
-       if (!this_cpu_has(X86_FEATURE_CLFLSH))
+       if (!this_cpu_has(X86_FEATURE_CLFLUSH))
                return;
        if (__this_cpu_read(cpu_info.cpuid_level) < CPUID_MWAIT_LEAF)
                return;
index c697625..e5503d8 100644 (file)
@@ -263,7 +263,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
                F(TSC) | F(MSR) | F(PAE) | F(MCE) |
                F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
                F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
-               F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
+               F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLUSH) |
                0 /* Reserved, DS, ACPI */ | F(MMX) |
                F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
                0 /* HTT, TM, Reserved, PBE */;
index 49bac41..c3e67ba 100644 (file)
@@ -520,7 +520,7 @@ struct psb_mmu_driver *psb_mmu_driver_init(uint8_t __iomem * registers,
 
        driver->has_clflush = 0;
 
-       if (boot_cpu_has(X86_FEATURE_CLFLSH)) {
+       if (boot_cpu_has(X86_FEATURE_CLFLUSH)) {
                uint32_t tfms, misc, cap0, cap4, clflush_size;
 
                /*