watchdog: ath79_wdt: flush register writes
authorGabor Juhos <juhosg@openwrt.org>
Fri, 23 Dec 2011 18:25:42 +0000 (19:25 +0100)
committerWim Van Sebroeck <wim@iguana.be>
Fri, 6 Jan 2012 14:27:51 +0000 (15:27 +0100)
The watchdog register writes required to have a flush
in order to commit the values to the register. Without
the flush, the driver not function correctly on AR934X
SoCs.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
drivers/watchdog/ath79_wdt.c

index 725c84b..9db8083 100644 (file)
@@ -68,17 +68,23 @@ static int max_timeout;
 static inline void ath79_wdt_keepalive(void)
 {
        ath79_reset_wr(AR71XX_RESET_REG_WDOG, wdt_freq * timeout);
+       /* flush write */
+       ath79_reset_rr(AR71XX_RESET_REG_WDOG);
 }
 
 static inline void ath79_wdt_enable(void)
 {
        ath79_wdt_keepalive();
        ath79_reset_wr(AR71XX_RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_FCR);
+       /* flush write */
+       ath79_reset_rr(AR71XX_RESET_REG_WDOG_CTRL);
 }
 
 static inline void ath79_wdt_disable(void)
 {
        ath79_reset_wr(AR71XX_RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_NONE);
+       /* flush write */
+       ath79_reset_rr(AR71XX_RESET_REG_WDOG_CTRL);
 }
 
 static int ath79_wdt_set_timeout(int val)