drm/nouveau/fifo/gk104: add sec plumbing
authorBen Skeggs <bskeggs@redhat.com>
Fri, 11 Mar 2016 03:09:28 +0000 (13:09 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Mon, 14 Mar 2016 00:13:46 +0000 (10:13 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/include/nvif/cla06f.h
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c

index 663ecde..b5dec13 100644 (file)
@@ -7,6 +7,7 @@ struct kepler_channel_gpfifo_a_v0 {
        __u16 chid;
 #define NVA06F_V0_ENGINE_SW                                          0x00000001
 #define NVA06F_V0_ENGINE_GR                                          0x00000002
+#define NVA06F_V0_ENGINE_SEC                                         0x00000004
 #define NVA06F_V0_ENGINE_MSVLD                                       0x00000010
 #define NVA06F_V0_ENGINE_MSPDEC                                      0x00000020
 #define NVA06F_V0_ENGINE_MSPPP                                       0x00000040
index 434335a..917ef0f 100644 (file)
@@ -63,6 +63,7 @@ gk104_fifo_gpfifo_engine_addr(struct nvkm_engine *engine)
        case NVKM_ENGINE_CE1   :
        case NVKM_ENGINE_CE2   : return 0x0000;
        case NVKM_ENGINE_GR    : return 0x0210;
+       case NVKM_ENGINE_SEC   : return 0x0220;
        case NVKM_ENGINE_MSPDEC: return 0x0250;
        case NVKM_ENGINE_MSPPP : return 0x0260;
        case NVKM_ENGINE_MSVLD : return 0x0270;
@@ -340,6 +341,7 @@ gk104_fifo_gpfifo[] = {
        { NVA06F_V0_ENGINE_SW | NVA06F_V0_ENGINE_GR,
                BIT_ULL(NVKM_ENGINE_SW) | BIT_ULL(NVKM_ENGINE_GR)
        },
+       { NVA06F_V0_ENGINE_SEC   , BIT_ULL(NVKM_ENGINE_SEC   ) },
        { NVA06F_V0_ENGINE_MSVLD , BIT_ULL(NVKM_ENGINE_MSVLD ) },
        { NVA06F_V0_ENGINE_MSPDEC, BIT_ULL(NVKM_ENGINE_MSPDEC) },
        { NVA06F_V0_ENGINE_MSPPP , BIT_ULL(NVKM_ENGINE_MSPPP ) },