ARM: dts: brcmstb: add BCM7445 system PM DT nodes
authorBrian Norris <computersforpeace@gmail.com>
Fri, 19 Jun 2015 00:11:36 +0000 (17:11 -0700)
committerFlorian Fainelli <f.fainelli@gmail.com>
Mon, 14 Sep 2015 22:48:05 +0000 (15:48 -0700)
Need the aon-ctrl, boot SRAM, and memory_controller descriptions.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
[florian: remove wake-timer, aon-pm-l2-intc duplicate]
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
arch/arm/boot/dts/bcm7445.dtsi

index 3b6b175..4791321 100644 (file)
                        brcm,irq-can-wake;
                };
 
+               aon-ctrl@410000 {
+                       compatible = "brcm,brcmstb-aon-ctrl";
+                       reg = <0x410000 0x200>, <0x410200 0x400>;
+                       reg-names = "aon-ctrl", "aon-sram";
+               };
+
                nand: nand@3e2800 {
                        status = "disabled";
                        #address-cells = <1>;
 
        };
 
+       memory_controllers {
+               compatible = "simple-bus";
+               ranges = <0x0 0x0 0xf1100000 0x200000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               memc@0 {
+                       compatible = "brcm,brcmstb-memc", "simple-bus";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x0 0x0 0x80000>;
+
+                       memc-ddr@2000 {
+                               compatible = "brcm,brcmstb-memc-ddr";
+                               reg = <0x2000 0x800>;
+                       };
+
+                       ddr-phy@6000 {
+                               compatible = "brcm,brcmstb-ddr-phy-v240.1";
+                               reg = <0x6000 0x21c>;
+                               };
+
+                       shimphy@8000 {
+                               compatible = "brcm,brcmstb-ddr-shimphy-v1.0";
+                               reg = <0x8000 0xe4>;
+                       };
+               };
+
+               memc@1 {
+                       compatible = "brcm,brcmstb-memc", "simple-bus";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x0 0x80000 0x80000>;
+
+                       memc-ddr@2000 {
+                               compatible = "brcm,brcmstb-memc-ddr";
+                               reg = <0x2000 0x800>;
+                       };
+
+                       ddr-phy@6000 {
+                               compatible = "brcm,brcmstb-ddr-phy-v240.1";
+                               reg = <0x6000 0x21c>;
+                       };
+
+                       shimphy@8000 {
+                               compatible = "brcm,brcmstb-ddr-shimphy-v1.0";
+                               reg = <0x8000 0xe4>;
+                       };
+               };
+
+               memc@2 {
+                       compatible = "brcm,brcmstb-memc", "simple-bus";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x0 0x100000 0x80000>;
+
+                       memc-ddr@2000 {
+                               compatible = "brcm,brcmstb-memc-ddr";
+                               reg = <0x2000 0x800>;
+                       };
+
+                       ddr-phy@6000 {
+                               compatible = "brcm,brcmstb-ddr-phy-v240.1";
+                               reg = <0x6000 0x21c>;
+                       };
+
+                       shimphy@8000 {
+                               compatible = "brcm,brcmstb-ddr-shimphy-v1.0";
+                               reg = <0x8000 0xe4>;
+                       };
+               };
+       };
+
+       sram@ffe00000 {
+               compatible = "brcm,boot-sram", "mmio-sram";
+               reg = <0x0 0xffe00000 0x0 0x10000>;
+       };
+
        smpboot {
                compatible = "brcm,brcmstb-smpboot";
                syscon-cpu = <&hif_cpubiuctrl 0x88 0x178>;