KVM: arm/arm64: vgic-v2: Only wipe LRs on vcpu exit

So far, we're always writing all possible LRs, setting the empty
ones with a zero value. This is obvious doing a lot of work for
nothing, and we're better off clearing those we've actually
dirtied on the exit path (it is very rare to inject more than one
interrupt at a time anyway).

Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>

diff --git a/virt/kvm/arm/hyp/vgic-v2-sr.c b/virt/kvm/arm/hyp/vgic-v2-sr.c
index 6d4dd78..674bdf8 100644 (file)
--- a/virt/kvm/arm/hyp/vgic-v2-sr.c
+++ b/virt/kvm/arm/hyp/vgic-v2-sr.c
@@ -99,6 +99,7 @@ static void __hyp_text save_lrs(struct kvm_vcpu *vcpu, void __iomem *base)
                }
 
                cpu_if->vgic_lr[i] = readl_relaxed(base + GICH_LR0 + (i * 4));
+               writel_relaxed(0, base + GICH_LR0 + (i * 4));
        }
 }
 
@@ -156,12 +157,11 @@ void __hyp_text __vgic_v2_restore_state(struct kvm_vcpu *vcpu)
                writel_relaxed(cpu_if->vgic_hcr, base + GICH_HCR);
                writel_relaxed(cpu_if->vgic_apr, base + GICH_APR);
                for (i = 0; i < nr_lr; i++) {
-                       u32 val = 0;
-
-                       if (live_lrs & (1UL << i))
-                               val = cpu_if->vgic_lr[i];
+                       if (!(live_lrs & (1UL << i)))
+                               continue;
 
-                       writel_relaxed(val, base + GICH_LR0 + (i * 4));
+                       writel_relaxed(cpu_if->vgic_lr[i],
+                                      base + GICH_LR0 + (i * 4));
                }
        }