ARM: mvebu: add Device Tree description of AHCI interfaces on Armada 38x

The Marvell Armada 38x processors contain two AHCI compatible
interfaces. This commit adds the Device Tree description of those
interfaces at the SoC level, and also enables them on the Armada 385
DB platform, which allows access to both interfaces through SATA
ports.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397574006-5868-4-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

diff --git a/arch/arm/boot/dts/armada-385-db.dts b/arch/arm/boot/dts/armada-385-db.dts
index 959aeed..1ad988b 100644 (file)
--- a/arch/arm/boot/dts/armada-385-db.dts
+++ b/arch/arm/boot/dts/armada-385-db.dts
@@ -81,6 +81,14 @@
                                };
                        };
 
+                       sata@a8000 {
+                               status = "okay";
+                       };
+
+                       sata@e0000 {
+                               status = "okay";
+                       };
+
                        flash@d0000 {
                                status = "okay";
                                num-cs = <1>;

diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index 7e1b243..7c3f3dd 100644 (file)
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -365,6 +365,22 @@
                                reg = <0x72004 0x4>;
                        };
 
+                       sata@a8000 {
+                               compatible = "marvell,armada-380-ahci";
+                               reg = <0xa8000 0x2000>;
+                               interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&gateclk 15>;
+                               status = "disabled";
+                       };
+
+                       sata@e0000 {
+                               compatible = "marvell,armada-380-ahci";
+                               reg = <0xe0000 0x2000>;
+                               interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&gateclk 30>;
+                               status = "disabled";
+                       };
+
                        coredivclk: clock@e4250 {
                                compatible = "marvell,armada-380-corediv-clock";
                                reg = <0xe4250 0xc>;