b43: N-PHY: Implement MAC PHY clock set
authorGábor Stefanik <netrolller.3d@gmail.com>
Mon, 16 Aug 2010 20:39:16 +0000 (22:39 +0200)
committerJohn W. Linville <linville@tuxdriver.com>
Tue, 24 Aug 2010 20:28:11 +0000 (16:28 -0400)
Signed-off-by: Gábor Stefanik <netrolller.3d@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/b43/phy_n.c
include/linux/ssb/ssb_regs.h

index f1b5707..d212726 100644 (file)
@@ -3074,6 +3074,17 @@ static int b43_nphy_cal_rx_iq(struct b43_wldev *dev,
                return b43_nphy_rev2_cal_rx_iq(dev, target, type, debug);
 }
 
+/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/MacPhyClkSet */
+static void b43_nphy_mac_phy_clock_set(struct b43_wldev *dev, bool on)
+{
+       u32 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
+       if (on)
+               tmslow |= SSB_TMSLOW_PHYCLK;
+       else
+               tmslow &= ~SSB_TMSLOW_PHYCLK;
+       ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
+}
+
 /*
  * Init N-PHY
  * http://bcm-v4.sipsolutions.net/802.11/PHY/Init/N
@@ -3174,7 +3185,7 @@ int b43_phy_initn(struct b43_wldev *dev)
        b43_phy_write(dev, B43_NPHY_BBCFG, tmp & ~B43_NPHY_BBCFG_RSTCCA);
        b43_nphy_bmac_clock_fgc(dev, 0);
 
-       /* TODO N PHY MAC PHY Clock Set with argument 1 */
+       b43_nphy_mac_phy_clock_set(dev, true);
 
        b43_nphy_pa_override(dev, false);
        b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RX2TX);
index a6d5225..11daf9c 100644 (file)
@@ -97,6 +97,7 @@
 #define  SSB_TMSLOW_RESET      0x00000001 /* Reset */
 #define  SSB_TMSLOW_REJECT_22  0x00000002 /* Reject (Backplane rev 2.2) */
 #define  SSB_TMSLOW_REJECT_23  0x00000004 /* Reject (Backplane rev 2.3) */
+#define  SSB_TMSLOW_PHYCLK     0x00000010 /* MAC PHY Clock Control Enable */
 #define  SSB_TMSLOW_CLOCK      0x00010000 /* Clock Enable */
 #define  SSB_TMSLOW_FGC                0x00020000 /* Force Gated Clocks On */
 #define  SSB_TMSLOW_PE         0x40000000 /* Power Management Enable */