Merge commit 'origin/x86/urgent' into x86/asm

diff --combined arch/x86/include/asm/lguest.h
index 94cd698,5136dad..0d97deb
--- 1/arch/x86/include/asm/lguest.h
--- 2/arch/x86/include/asm/lguest.h
+++ b/arch/x86/include/asm/lguest.h
@@@ -17,8 -17,7 +17,7 @@@
  /* Pages for switcher itself, then two pages per cpu */
  #define TOTAL_SWITCHER_PAGES (SHARED_SWITCHER_PAGES + 2 * nr_cpu_ids)
  
- /* We map at -4M (-2M when PAE is activated) for ease of mapping
-  * into the guest (one PTE page). */
+ /* We map at -4M (-2M for PAE) for ease of mapping (one PTE page). */
  #ifdef CONFIG_X86_PAE
  #define SWITCHER_ADDR 0xFFE00000
  #else
@@@ -91,9 -90,8 +90,9 @@@ static inline void lguest_set_ts(void
  }
  
  /* Full 4G segment descriptors, suitable for CS and DS. */
 -#define FULL_EXEC_SEGMENT ((struct desc_struct){ { {0x0000ffff, 0x00cf9b00} } })
 -#define FULL_SEGMENT ((struct desc_struct){ { {0x0000ffff, 0x00cf9300} } })
 +#define FULL_EXEC_SEGMENT \
 +      ((struct desc_struct)GDT_ENTRY_INIT(0xc09b, 0, 0xfffff))
 +#define FULL_SEGMENT ((struct desc_struct)GDT_ENTRY_INIT(0xc093, 0, 0xfffff))
  
  #endif /* __ASSEMBLY__ */
  

diff --combined arch/x86/kernel/apm_32.c
index 39a4462,442b550..151ace6
--- 1/arch/x86/kernel/apm_32.c
--- 2/arch/x86/kernel/apm_32.c
+++ b/arch/x86/kernel/apm_32.c
@@@ -403,15 -403,7 +403,15 @@@ static DECLARE_WAIT_QUEUE_HEAD(apm_wait
  static DECLARE_WAIT_QUEUE_HEAD(apm_suspend_waitqueue);
  static struct apm_user *user_list;
  static DEFINE_SPINLOCK(user_list_lock);
 -static const struct desc_struct       bad_bios_desc = { { { 0, 0x00409200 } } };
 +
 +/*
 + * Set up a segment that references the real mode segment 0x40
 + * that extends up to the end of page zero (that we have reserved).
 + * This is for buggy BIOS's that refer to (real mode) segment 0x40
 + * even though they are called in protected mode.
 + */
 +static struct desc_struct bad_bios_desc = GDT_ENTRY_INIT(0x4092,
 +                      (unsigned long)__va(0x400UL), PAGE_SIZE - 0x400 - 1);
  
  static const char driver_version[] = "1.16ac";        /* no spaces */
  
@@@ -819,7 -811,7 +819,7 @@@ static int apm_do_idle(void
        u8 ret = 0;
        int idled = 0;
        int polling;
-       int err;
+       int err = 0;
  
        polling = !!(current_thread_info()->status & TS_POLLING);
        if (polling) {
@@@ -2339,6 -2331,15 +2339,6 @@@ static int __init apm_init(void
        }
        pm_flags |= PM_APM;
  
 -      /*
 -       * Set up a segment that references the real mode segment 0x40
 -       * that extends up to the end of page zero (that we have reserved).
 -       * This is for buggy BIOS's that refer to (real mode) segment 0x40
 -       * even though they are called in protected mode.
 -       */
 -      set_base(bad_bios_desc, __va((unsigned long)0x40 << 4));
 -      _set_limit((char *)&bad_bios_desc, 4095 - (0x40 << 4));
 -
        /*
         * Set up the long jump entry point to the APM BIOS, which is called
         * from inline assembly.
@@@ -2357,12 -2358,12 +2357,12 @@@
         * code to that CPU.
         */
        gdt = get_cpu_gdt_table(0);
 -      set_base(gdt[APM_CS >> 3],
 -               __va((unsigned long)apm_info.bios.cseg << 4));
 -      set_base(gdt[APM_CS_16 >> 3],
 -               __va((unsigned long)apm_info.bios.cseg_16 << 4));
 -      set_base(gdt[APM_DS >> 3],
 -               __va((unsigned long)apm_info.bios.dseg << 4));
 +      set_desc_base(&gdt[APM_CS >> 3],
 +               (unsigned long)__va((unsigned long)apm_info.bios.cseg << 4));
 +      set_desc_base(&gdt[APM_CS_16 >> 3],
 +               (unsigned long)__va((unsigned long)apm_info.bios.cseg_16 << 4));
 +      set_desc_base(&gdt[APM_DS >> 3],
 +               (unsigned long)__va((unsigned long)apm_info.bios.dseg << 4));
  
        proc_create("apm", 0, NULL, &apm_file_ops);
  

diff --combined arch/x86/kernel/cpu/common.c
index b5764a2,5ce60a8..ced07ba
--- 1/arch/x86/kernel/cpu/common.c
--- 2/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@@ -59,7 -59,30 +59,30 @@@ void __init setup_cpu_local_masks(void
        alloc_bootmem_cpumask_var(&cpu_sibling_setup_mask);
  }
  
- static const struct cpu_dev *this_cpu __cpuinitdata;
+ static void __cpuinit default_init(struct cpuinfo_x86 *c)
+ {
+ #ifdef CONFIG_X86_64
+       display_cacheinfo(c);
+ #else
+       /* Not much we can do here... */
+       /* Check if at least it has cpuid */
+       if (c->cpuid_level == -1) {
+               /* No cpuid. It must be an ancient CPU */
+               if (c->x86 == 4)
+                       strcpy(c->x86_model_id, "486");
+               else if (c->x86 == 3)
+                       strcpy(c->x86_model_id, "386");
+       }
+ #endif
+ }
+ 
+ static const struct cpu_dev __cpuinitconst default_cpu = {
+       .c_init         = default_init,
+       .c_vendor       = "Unknown",
+       .c_x86_vendor   = X86_VENDOR_UNKNOWN,
+ };
+ 
+ static const struct cpu_dev *this_cpu __cpuinitdata = &default_cpu;
  
  DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = {
  #ifdef CONFIG_X86_64
@@@ -71,45 -94,45 +94,45 @@@
         * TLS descriptors are currently at a different place compared to i386.
         * Hopefully nobody expects them at a fixed place (Wine?)
         */
 -      [GDT_ENTRY_KERNEL32_CS]         = { { { 0x0000ffff, 0x00cf9b00 } } },
 -      [GDT_ENTRY_KERNEL_CS]           = { { { 0x0000ffff, 0x00af9b00 } } },
 -      [GDT_ENTRY_KERNEL_DS]           = { { { 0x0000ffff, 0x00cf9300 } } },
 -      [GDT_ENTRY_DEFAULT_USER32_CS]   = { { { 0x0000ffff, 0x00cffb00 } } },
 -      [GDT_ENTRY_DEFAULT_USER_DS]     = { { { 0x0000ffff, 0x00cff300 } } },
 -      [GDT_ENTRY_DEFAULT_USER_CS]     = { { { 0x0000ffff, 0x00affb00 } } },
 +      [GDT_ENTRY_KERNEL32_CS]         = GDT_ENTRY_INIT(0xc09b, 0, 0xfffff),
 +      [GDT_ENTRY_KERNEL_CS]           = GDT_ENTRY_INIT(0xa09b, 0, 0xfffff),
 +      [GDT_ENTRY_KERNEL_DS]           = GDT_ENTRY_INIT(0xc093, 0, 0xfffff),
 +      [GDT_ENTRY_DEFAULT_USER32_CS]   = GDT_ENTRY_INIT(0xc0fb, 0, 0xfffff),
 +      [GDT_ENTRY_DEFAULT_USER_DS]     = GDT_ENTRY_INIT(0xc0f3, 0, 0xfffff),
 +      [GDT_ENTRY_DEFAULT_USER_CS]     = GDT_ENTRY_INIT(0xa0fb, 0, 0xfffff),
  #else
 -      [GDT_ENTRY_KERNEL_CS]           = { { { 0x0000ffff, 0x00cf9a00 } } },
 -      [GDT_ENTRY_KERNEL_DS]           = { { { 0x0000ffff, 0x00cf9200 } } },
 -      [GDT_ENTRY_DEFAULT_USER_CS]     = { { { 0x0000ffff, 0x00cffa00 } } },
 -      [GDT_ENTRY_DEFAULT_USER_DS]     = { { { 0x0000ffff, 0x00cff200 } } },
 +      [GDT_ENTRY_KERNEL_CS]           = GDT_ENTRY_INIT(0xc09a, 0, 0xfffff),
 +      [GDT_ENTRY_KERNEL_DS]           = GDT_ENTRY_INIT(0xc092, 0, 0xfffff),
 +      [GDT_ENTRY_DEFAULT_USER_CS]     = GDT_ENTRY_INIT(0xc0fa, 0, 0xfffff),
 +      [GDT_ENTRY_DEFAULT_USER_DS]     = GDT_ENTRY_INIT(0xc0f2, 0, 0xfffff),
        /*
         * Segments used for calling PnP BIOS have byte granularity.
         * They code segments and data segments have fixed 64k limits,
         * the transfer segment sizes are set at run time.
         */
        /* 32-bit code */
 -      [GDT_ENTRY_PNPBIOS_CS32]        = { { { 0x0000ffff, 0x00409a00 } } },
 +      [GDT_ENTRY_PNPBIOS_CS32]        = GDT_ENTRY_INIT(0x409a, 0, 0xffff),
        /* 16-bit code */
 -      [GDT_ENTRY_PNPBIOS_CS16]        = { { { 0x0000ffff, 0x00009a00 } } },
 +      [GDT_ENTRY_PNPBIOS_CS16]        = GDT_ENTRY_INIT(0x009a, 0, 0xffff),
        /* 16-bit data */
 -      [GDT_ENTRY_PNPBIOS_DS]          = { { { 0x0000ffff, 0x00009200 } } },
 +      [GDT_ENTRY_PNPBIOS_DS]          = GDT_ENTRY_INIT(0x0092, 0, 0xffff),
        /* 16-bit data */
 -      [GDT_ENTRY_PNPBIOS_TS1]         = { { { 0x00000000, 0x00009200 } } },
 +      [GDT_ENTRY_PNPBIOS_TS1]         = GDT_ENTRY_INIT(0x0092, 0, 0),
        /* 16-bit data */
 -      [GDT_ENTRY_PNPBIOS_TS2]         = { { { 0x00000000, 0x00009200 } } },
 +      [GDT_ENTRY_PNPBIOS_TS2]         = GDT_ENTRY_INIT(0x0092, 0, 0),
        /*
         * The APM segments have byte granularity and their bases
         * are set at run time.  All have 64k limits.
         */
        /* 32-bit code */
 -      [GDT_ENTRY_APMBIOS_BASE]        = { { { 0x0000ffff, 0x00409a00 } } },
 +      [GDT_ENTRY_APMBIOS_BASE]        = GDT_ENTRY_INIT(0x409a, 0, 0xffff),
        /* 16-bit code */
 -      [GDT_ENTRY_APMBIOS_BASE+1]      = { { { 0x0000ffff, 0x00009a00 } } },
 +      [GDT_ENTRY_APMBIOS_BASE+1]      = GDT_ENTRY_INIT(0x009a, 0, 0xffff),
        /* data */
 -      [GDT_ENTRY_APMBIOS_BASE+2]      = { { { 0x0000ffff, 0x00409200 } } },
 +      [GDT_ENTRY_APMBIOS_BASE+2]      = GDT_ENTRY_INIT(0x4092, 0, 0xffff),
  
 -      [GDT_ENTRY_ESPFIX_SS]           = { { { 0x0000ffff, 0x00cf9200 } } },
 -      [GDT_ENTRY_PERCPU]              = { { { 0x0000ffff, 0x00cf9200 } } },
 +      [GDT_ENTRY_ESPFIX_SS]           = GDT_ENTRY_INIT(0xc092, 0, 0xfffff),
 +      [GDT_ENTRY_PERCPU]              = GDT_ENTRY_INIT(0xc092, 0, 0xfffff),
        GDT_STACK_CANARY_INIT
  #endif
  } };
@@@ -332,29 -355,6 +355,6 @@@ void switch_to_new_gdt(int cpu
  
  static const struct cpu_dev *__cpuinitdata cpu_devs[X86_VENDOR_NUM] = {};
  
- static void __cpuinit default_init(struct cpuinfo_x86 *c)
- {
- #ifdef CONFIG_X86_64
-       display_cacheinfo(c);
- #else
-       /* Not much we can do here... */
-       /* Check if at least it has cpuid */
-       if (c->cpuid_level == -1) {
-               /* No cpuid. It must be an ancient CPU */
-               if (c->x86 == 4)
-                       strcpy(c->x86_model_id, "486");
-               else if (c->x86 == 3)
-                       strcpy(c->x86_model_id, "386");
-       }
- #endif
- }
- 
- static const struct cpu_dev __cpuinitconst default_cpu = {
-       .c_init = default_init,
-       .c_vendor = "Unknown",
-       .c_x86_vendor = X86_VENDOR_UNKNOWN,
- };
- 
  static void __cpuinit get_model_name(struct cpuinfo_x86 *c)
  {
        unsigned int *v;