ARM: mvebu: Add support for the network controller in Armada 375 SoC
authorEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Thu, 10 Jul 2014 19:52:14 +0000 (16:52 -0300)
committerJason Cooper <jason@lakedaemon.net>
Sun, 13 Jul 2014 21:51:27 +0000 (21:51 +0000)
This commit adds the support for the network controller in Marvell
Armada 375 SoC devicetree.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Link: https://lkml.kernel.org/r/1405021936-28658-3-git-send-email-ezequiel.garcia@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
arch/arm/boot/dts/armada-375.dtsi

index fb92551..d4619ad 100644 (file)
                                      <0xc100 0x100>;
                        };
 
+                       mdio {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "marvell,orion-mdio";
+                               reg = <0xc0054 0x4>;
+                       };
+
+                       /* Network controller */
+                       ethernet@f0000 {
+                               compatible = "marvell,armada-375-pp2";
+                               reg = <0xf0000 0xa000>, /* Packet Processor regs */
+                                     <0xc0000 0x3060>, /* LMS regs */
+                                     <0xc4000 0x100>,  /* eth0 regs */
+                                     <0xc5000 0x100>;  /* eth1 regs */
+                               clocks = <&gateclk 3>, <&gateclk 19>;
+                               clock-names = "pp_clk", "gop_clk";
+                               status = "disabled";
+
+                               eth0: eth0@c4000 {
+                                       interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+                                       port-id = <0>;
+                                       status = "disabled";
+                               };
+
+                               eth1: eth1@c5000 {
+                                       interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+                                       port-id = <1>;
+                                       status = "disabled";
+                               };
+                       };
+
                        spi0: spi@10600 {
                                compatible = "marvell,orion-spi";
                                reg = <0x10600 0x50>;