pinctrl: Add Pistachio SoC pin control driver
authorAndrew Bresticker <abrestic@chromium.org>
Wed, 6 May 2015 19:59:03 +0000 (12:59 -0700)
committerLinus Walleij <linus.walleij@linaro.org>
Tue, 12 May 2015 11:19:41 +0000 (13:19 +0200)
commitcefc03e5995e82082b1e4cda4ef565ccdaff1f45
tree605f539a8b6a164dfd2e8f3c3216b12a49d21ae9
parent403fbdee4728afc4e5c4b0a24b8eac3b52595b39
pinctrl: Add Pistachio SoC pin control driver

Add a driver for the pin controller present on the IMG Pistachio SoC.
This driver provides pinmux and pinconfig operations as well as GPIO
and IRQ chips for the GPIO banks.

Changes from v4:
 - Switched to using gpiochip_add_pin_range().
 - Fixed up Kconfig entry.
Changes from v3:
 - Addressed review comments from Ezequiel.
Changes from v2:
 - Removed module stuff which would be compiled out.
Changes from v1:
 - Addressed review comments from Linus.
 - Changed compatible string to "img,pistachio-system-pinctrl".
 - Look for GPIO sub-nodes by name.
 - A couple of bug fixes.

Signed-off-by: Damien Horsley <Damien.Horsley@imgtec.com>
Signed-off-by: Govindraj Raja <govindraj.raja@imgtec.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Signed-off-by: Kevin Cernekee <cernekee@chromium.org>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Cc: James Hartley <james.hartley@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/Kconfig
drivers/pinctrl/Makefile
drivers/pinctrl/pinctrl-pistachio.c [new file with mode: 0644]